73S1210F-68IM/F Maxim Integrated Products, 73S1210F-68IM/F Datasheet - Page 87

• Manufacturer Part Number: 73S1210F-68IM/F
• Description: IC SMART CARD READER 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 73S1210F-68IM/F

• Core Processor: 80515
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, SmartCard, UART/USART
• Peripherals: LED, POR, WDT
• Number Of I /o: 8
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DS_1210F_001
STX Data Register (STXData): 0xFE07  0x00
SRX Control/Status Register (SRXCtl): 0xFE08  0x00
This register is used to monitor reception of data from the smart card.
Rev. 1.4
MSB
SRXCtl.7
SRXCtl.6
SRXCtl.5
SRXCtl.4
SRXCtl.3
SRXCtl.2
SRXCtl.1
SRXCtl.0
STXDAT.7
STXData.7
STXData.6
STXData.5
STXData.4
STXData.3
STXData.2
STXData.1
STXData.0
Bit
BIT9DAT
Bit
MSB
STXDAT.6 STXDAT.5 STXDAT.4 STXDAT.3
CRCERR
RXOVRR
PARITYE
BIT9DAT
RXEMTY
LASTRX
Data to be transmitted to smart card. Gets stored in the TX FIFO and then extracted by
the hardware and sent to the selected smart card. When the MPU reads this register,
the byte pointer is changed to effectively “read out” the data. Thus, two reads will
always result in an “empty” FIFO condition. The contents of the FIFO registers are not
cleared, but will be overwritten by writes.
RXFULL
Symbol
–
–
Bit 9 Data - When in sync mode and with MODE9/8B set, this bit will contain
the data on IO (or SIO) pin that was sampled on the ninth CLK (or SCLK)
rising edge. This is used to read data in synchronous 9-bit formats.
Last RX Byte - User sets this bit during the reception of the last byte. When
byte is received and this bit is set, logic checks CRC to match 0x1D0F (T=1
mode) or LRC to match 00h (T=1 mode), otherwise a CRC or LRC error is
asserted.
(Read only) 1 = CRC (or LRC) error has been detected.
(Read only) RX FIFO is full. Status bit to indicate RX FIFO is full.
(Read only) RX FIFO is empty. This is only a status bit and does not generate
an RX interrupt.
RX Overrun - (Read Only) Asserted when a receive-over-run condition has
occurred. An over-run is defined as a byte was received from the smart card
when the RX FIFO was full. Invalid data may be in the receive FIFO.
Firmware should take appropriate action. Cleared when read. Additional
writes to the RX FIFO are discarded when a RXOVRR occurs until the overrun
condition is cleared. Will generate an RXERR interrupt.
Parity Error - (Read only) 1 = The logic detected a parity error on incoming
data from the smart card. Cleared when read. Will generate an RXERR
interrupt.
LASTRX
Table 79: The STXData Register
Table 80: The SRXCtl Register
CRCERR
RXFULL RXEMTY RXOVRR PARITYE
Function
Function
STXDAT.2
STXDAT.1
73S1210F Data Sheet
LSB
STXDAT.0
LSB
87