73S1210F-68IM/F Maxim Integrated Products, 73S1210F-68IM/F Datasheet - Page 84

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73S1210F-68IM/F

Manufacturer Part Number
73S1210F-68IM/F
Description
IC SMART CARD READER 68-QFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of 73S1210F-68IM/F

Core Processor
80515
Core Size
8-Bit
Speed
24MHz
Connectivity
I²C, SmartCard, UART/USART
Peripherals
LED, POR, WDT
Number Of I /o
8
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
73S1210F-68IM/F
Manufacturer:
TERIDIAN
Quantity:
7 728
73S1210F Data Sheet
V
A programmable timer is provided to set the time from activation start (setting the VCCSEL.1 and
VCCSEL.0 bits to non-zero) to when VCC_OK is evaluated. VCC_OK must be true at the end of this
timers programmed interval (tto in
is not true and the end of the interval (tto), the Card Event interrupt will be set, and a deactivation
sequence shall begin including clearing of the VCCSEL bits.
MSB
84
OFFTMR.3 OFFTMR.2 OFFTMR.1 OFFTMR.0 VCCTMR.3 VCCTMR.2 VCCTMR.1 VCCTMR.0
CC
Stable Timer Register (VccTmr): 0xFE04  0x0F
VccTmr.7
VccTmr.6
VccTmr.5
VccTmr.4
VccTmr.3
VccTmr.2
VccTmr.1
VccTmr.0
Bit
VCCTMR.3 VCC Timer - VCCOK must be true at the time set by the value in
VCCTMR.2
VCCTMR.1
VCCTMR.0
OFFTMR.3 VCC Off Timer - The bits set the delay (in number of ETUs) for
OFFTMR.2
OFFTMR.1
OFFTMR.0
Symbol
deactivation after the VCCSEL.1 and VCC SEL.0 have been set
to 0. The time value is a count of the 32768Hz clock and is given
by tto = OFFTMR(7:4) * 30.5µs. This delay does not affect
emergency deactivations due to VDD Fault or card events. A
value of 0000 results in no additional delay.
these bits in order for the activation sequence to continue. If not,
the VCCSEL bits will be cleared. The time value is a count of the
32768Hz clock and is given by tto = VCCTMR(3:0) * 30.5µs. A
value of 0000 results in no timeout, not zero time, and activation
requires that RDYST is set and RDY goes high.
Figure
Table 76: The VccTmr Register
16) in order for the activation sequence to continue. If VCC_OK
Function
DS_1210F_001
Rev. 1.4
LSB

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