73S1210F-68IM/F Maxim Integrated Products, 73S1210F-68IM/F Datasheet - Page 83

• Manufacturer Part Number: 73S1210F-68IM/F
• Description: IC SMART CARD READER 68-QFN
• Manufacturer: Maxim Integrated Products

Specifications of 73S1210F-68IM/F

• Core Processor: 80515
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: I²C, SmartCard, UART/USART
• Peripherals: LED, POR, WDT
• Number Of I /o: 8
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 6.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DS_1210F_001
Smart Card V
This register is used to control the power up and power down of the integrated smart card interface. It is
used to determine whether to apply 5V, 3V, or 1.8 to the smart card. Perform the voltage selection with
one write operation, setting both VCCSEL.1 and VCCSEL.0 bits simultaneously. The VDDFLT bit (if
enabled) will provide an emergency deactivation of the internal smart card slot. See the
Detect Function
Rev. 1.4
MSB
VccCtl.7
VccCtl.6
VccCtl.5
VccCtl.4
VccCtl.3
VccCtl.2
VccCtl.1
VccCtl.0
VCCSEL.1 VCCSEL.0
Bit
SCPWRDN
VCCSEL.1
VCCSEL.0
CC
VDDFLT
Symbol
VCCOK
RDYST
section for more detail.
Control/Status Register (VccCtl): 0xFE03  0x00
–
–
Setting non-zero value for bits 7,6 will begin activation sequence with target
Vcc as given below:
State
1
2
3
4
be turned off. When this type of deactivation occurs, the bits must be reset
before initiating another activation.
When there is a VDD Fault event, this bit will be set = 0. This causes
VCCSEL.1 and VCCSEL.0 bits to be immediately set = 0 to begin
deactivation.
If this bit is set = 1, the activation sequence will start when bit VCCOK is set =
1. If not set, the deactivation sequence shall start when the VCCTMR times
out.
This bit controls the power-off mode of the 73S1210F circuit.
1 = power off, 0 = normal operation. When in power down mode,
V
application of 5V to V
it has no effect until V
A card event or VCCOK going low will initiate a deactivation sequence.
When the deactivation sequence for RST, CLK and I/O is complete, V
(Read only). Indicates that V
DD
VDDFLT
= 0V. V
VCCSEL.1
0
0
1
1
Table 75: The VccCtl Register
DD
RDYST
can only be turned on by pressing the ON/OFF switch or by
BUS
BUS
VCCSEL.0
0
1
0
1
. If V
is removed and V
VCCOK
CC
BUS
output voltage is stable.
power is available and SCPWRDN bit is set,
Function
VCC
0V
1.8V
3.0V
5V
–
DD
will shut off.
–
73S1210F Data Sheet
VDD Fault
SCPWRDN
CC
LSB
will
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