PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 94

PIC18F26K80-I/SO

Manufacturer Part Number

PIC18F26K80-I/SO

Description

MCU PIC 64KB FLASH 28SOIC

Manufacturer

Microchip Technology

Series

PIC® XLP™ 18Fr

Datasheet

1.PIC18F25K80-ISO.pdf (628 pages)

Specifications of PIC18F26K80-I/SO

Core Size

8-Bit

Program Memory Size

64KB (32K x 16)

Peripherals

Brown-out Detect/Reset, LVD, POR, PWM, WDT

Core Processor

PIC

Speed

64MHz

Connectivity

ECAN, I²C, LIN, SPI, UART/USART

Number Of I /o

Program Memory Type

FLASH

Eeprom Size

1K x 8

Ram Size

3.6K x 8

Voltage - Supply (vcc/vdd)

1.8 V ~ 5.5 V

Data Converters

A/D 8x12b

Oscillator Type

Internal

Operating Temperature

-40°C ~ 85°C

Package / Case

28-SOIC (0.300", 7.50mm Width)

Controller Family/series

PIC18

Ram Memory Size

4KB

Cpu Speed

16MIPS

No. Of Pwm Channels

Embedded Interface Type

I2C, SPI, USART

Processor Series

PIC18F26K80

Core

PIC

Data Bus Width

8 bit

Data Ram Size

1 KB

Interface Type

I2C, SPI, USART

Maximum Clock Frequency

64 MHz

Number Of Programmable I/os

Number Of Timers

Operating Supply Voltage

1.8 V to 5.5 V

Maximum Operating Temperature

+ 85 C

Mounting Style

SMD/SMT

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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PIC18F66K80 FAMILY

TABLE 5-4:

DS39977C-page 94

TXREG2

IPR5

PIR5

PIE5

EEADRH

EEADR

EEDATA

ECANCON

COMSTAT

CIOCON

CANCON

CANSTAT

RXB0D7

RXB0D6

RXB0D5

RXB0D4

RXB0D3

RXB0D2

RXB0D1

RXB0D0

RXB0DLC

RXB0EIDL

RXB0EIDH

RXB0SIDL

RXB0SIDH

RXB0CON

CM1CON

CM2CON

ANCON0

ANCON1

WPUB

IOCB

PMD0

Legend:

Note 1:

u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware

stack.

See

Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not

enabled as PORTA pins, they are disabled and read ‘0’.

This register reads all ‘0’s until the ECAN™ technology is set up in Mode 1 or Mode 2.

Table 5-3

INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

PIC18F2XK80

for Reset value for specific condition.

Applicable Devices

PIC18F4XK80

Preliminary

PIC18F6XK80

0000 0000

1111 1111

0000 0000

---- --00

xxxx xxxx

0xxx xxxx

xxxx xxxx

1111 1111

-111 1111

1111 1111

1111 ----

0000 0000

0001 0000

0000 0000

0000 ---0

1000 0000

xxxx x-xx

0000 0000

0001 1111

Brown-out

Power-on

Reset,

Reset

RESET Instruction,

MCLR Resets,

Stack Resets

WDT Reset,

0000 0000

1111 1111

0000 0000

---- --00

uuuu uuuu

0uuu uuuu

uuuu uuuu

0001 1111

1111 1111

-111 1111

1111 1111

1111 ----

0000 0000

0001 0000

0000 0000

0000 ---0

1000 0000

uuuu u-uu

0000 0000

 2011 Microchip Technology Inc.

Wake-up via

or Interrupt

uuuu uuuu

---- --00

uuuu uuuu

uuuu ---u

uuuu uuuu

uuuu u-uu

uuuu uuuu

-uuu uuuu

uuuu uuuu

uuuu ----

uuuu uuuu

WDT

PIC18F26K80-I/SO Microchip Technology, PIC18F26K80-I/SO Datasheet - Page 94

PIC18F26K80-I/SO

Specifications of PIC18F26K80-I/SO

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