MT47H256M4BT-5E:A TR Micron Technology Inc, MT47H256M4BT-5E:A TR Datasheet - Page 9

• Manufacturer Part Number: MT47H256M4BT-5E:A TR
• Description: IC DDR2 SDRAM 1GBIT 5NS 92FBGA
• Manufacturer: Micron Technology Inc

Specifications of MT47H256M4BT-5E:A TR

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 1G (256M x 4)
• Speed: 5ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 92-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1206-1

State Diagram
Figure 2: Simplified State Diagram
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. T 02/10 EN
Setting
default
EMRS
MRS
OCD
Note:
WRITE
precharge
WRITE A
Writing
Writing
(E)MRS
with
auto
1. This diagram provides the basic command flow. It is not comprehensive and does not
identify all timing requirements or possible command restrictions such as multibank in-
teraction, power down, entry/exit, etc.
power-
Active
down
Automatic Sequence
Command Sequence
WRITE
PRE
Initialization
precharged
Precharging
sequence
PRE, PRE_A
Activating
all banks
active
Bank
Idle
ACT
9
READ
ACT = ACTIVATE
CKE_H = CKE HIGH, exit power-down or self refresh
CKE_L = CKE LOW, enter power-down
(E)MRS = (Extended) mode register set
PRE = PRECHARGE
PRE_A = PRECHARGE ALL
READ = READ
READ A = READ with auto precharge
REFRESH = REFRESH
SR = SELF REFRESH
WRITE = WRITE
WRITE A = WRITE with auto precharge
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Precharge
power-
down
precharge
Reading
READ A
Reading
with
auto
REFRESH
1Gb: x4, x8, x16 DDR2 SDRAM
refreshing
CKE_L
Self
READ
CKE_L
Refreshing
© 2004 Micron Technology, Inc. All rights reserved.
State Diagram