LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 565

• Manufacturer Part Number: LPC1769FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1769FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4966; 935290522551

NXP Semiconductors
Table 514. Consolidated Time register 0 (CTIME0 - address 0x4002 4014) bit description
Table 515. Consolidated Time register 1 (CTIME1 - address 0x4002 4018) bit description
UM10360
User manual
26:24
31:27
27:16
31:28
Bit
5:0
7:6
13:8
15:14
20:16
23:21
Bit
4:0
7:5
11:8
15:12
Symbol
Seconds
-
Minutes
-
Hours
-
Day Of Week Day of week value in the range of 0 to 6
-
Symbol
Day of Month Day of month value in the range of 1 to 28, 29, 30, or 31 (depending on the month and
-
Month
-
Year
-
27.6.3.1 Consolidated Time Register 0 (CTIME0 - 0x4002 4014)
27.6.3.2 Consolidated Time Register 1 (CTIME1 - 0x4002 4018)
27.6.3.3 Consolidated Time Register 2 (CTIME2 - 0x4002 401C)
27.6.3 Consolidated time registers
The values of the Time Counters can optionally be read in a consolidated format which
allows the programmer to read all time counters with only three read operations. The
various registers are packed into 32-bit values as shown in
Table
The Consolidated Time Registers are read-only. To write new values to the Time
Counters, the Time Counter addresses should be used.
The Consolidated Time Register 0 contains the low order time values: Seconds, Minutes,
Hours, and Day of Week.
The Consolidate Time Register 1 contains the Day of Month, Month, and Year values.
The Consolidate Time Register 2 contains just the Day of Year value.
Description
Seconds value in the range of 0 to 59
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Minutes value in the range of 0 to 59
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Hours value in the range of 0 to 23
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Description
whether it is a leap year).
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Month value in the range of 1 to 12.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
Year value in the range of 0 to 4095.
Reserved, user software should not write ones to reserved bits. The value read from a
reserved bit is not defined.
516. The least significant bit of each register is read back at bit 0, 8, 16, or 24.
All information provided in this document is subject to legal disclaimers.
Chapter 27: LPC17xx Real-Time Clock (RTC) and backup registers
Rev. 2 — 19 August 2010
Table
514,
UM10360
Table
© NXP B.V. 2010. All rights reserved.
515, and
565 of 840
Reset
value
NC
NA
NC
NA
NC
NC
NA
NC
Reset
value
NC
NA
NC
NA
NC
NA