LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 831
LPC1769FBD100,551
Manufacturer Part Number
LPC1769FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.OM11043.pdf
(79 pages)
2.LPC1767FBD100551.pdf
(2 pages)
3.LPC1767FBD100551.pdf
(840 pages)
4.LPC1769FBD100551.pdf
(66 pages)
Specifications of LPC1769FBD100,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4966
935290522551
935290522551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1769FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
- OM11043 PDF datasheet
- LPC1767FBD100551 PDF datasheet #2
- LPC1767FBD100551 PDF datasheet #3
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NXP Semiconductors
23.3
23.4
23.5
23.5.1
23.5.2
Chapter 24: LPC17xx Pulse Width Modulator (PWM)
24.1
24.2
24.3
24.4
24.4.1
24.4.2
24.5
24.6
Chapter 25: LPC17xx Motor control PWM
25.1
25.2
25.3
25.4
25.5
25.6
25.7
25.7.1
25.7.1.1
25.7.1.2
25.7.1.3
25.7.2
25.7.2.1
25.7.2.2
25.7.2.3
UM10360
User manual
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 504
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504
Register description . . . . . . . . . . . . . . . . . . . 505
Basic configuration . . . . . . . . . . . . . . . . . . . . 509
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 509
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 510
Sample waveform with rules for single and
double edge control. . . . . . . . . . . . . . . . . . . . 512
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 513
Register description . . . . . . . . . . . . . . . . . . . 514
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 522
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 522
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 522
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 523
Configuring other modules for MCPWM use 524
General Operation . . . . . . . . . . . . . . . . . . . . . 524
Register description . . . . . . . . . . . . . . . . . . . 525
System Timer Control and status register
(STCTRL - 0xE000 E010) . . . . . . . . . . . . . . 505
System Timer Reload value register (STRELOAD
- 0xE000 E014). . . . . . . . . . . . . . . . . . . . . . . 506
Rules for Single Edge Controlled PWM
Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513
Rules for Double Edge Controlled PWM
Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513
MCPWM Control register . . . . . . . . . . . . . . . 526
MCPWM Control read address (MCCON -
0x400B 8000) . . . . . . . . . . . . . . . . . . . . . . . . 526
MCPWM Control set address (MCCON_SET -
0x400B 8004) . . . . . . . . . . . . . . . . . . . . . . . . 527
MCPWM Control clear address (MCCON_CLR -
0x400B 8008) . . . . . . . . . . . . . . . . . . . . . . . . 528
MCPWM Capture Control register . . . . . . . . 528
MCPWM Capture Control read address
(MCCAPCON - 0x400B 800C) . . . . . . . . . . . 528
MCPWM Capture Control set address
(MCCAPCON_SET - 0x400B 8010) . . . . . . . 529
MCPWM Capture control clear address
(MCCAPCON_CLR - 0x400B 8014). . . . . . . 529
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
23.5.3
23.5.4
23.6
24.6.1
24.6.2
24.6.3
24.6.4
24.6.5
24.6.6
24.6.7
25.7.3
7.3.1
25.7.3.2
25.7.3.3
25.7.3.4
25.7.3.5
25.7.3.6
25.7.4
25.7.4.1
25.7.4.2
25.7.4.3
25.7.5
Example timer calculations . . . . . . . . . . . . . 508
System Timer Current value register (STCURR -
0xE000 E018) . . . . . . . . . . . . . . . . . . . . . . . 506
System Timer Calibration value register
(STCALIB - 0xE000 E01C) . . . . . . . . . . . . . 506
Example 1). . . . . . . . . . . . . . . . . . . . . . . . . . . 508
Example 2). . . . . . . . . . . . . . . . . . . . . . . . . . . 508
Example 3). . . . . . . . . . . . . . . . . . . . . . . . . . . 508
Example 4). . . . . . . . . . . . . . . . . . . . . . . . . . . 508
PWM Interrupt Register (PWM1IR - 0x4001
8000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 515
PWM Timer Control Register (PWM1TCR
0x4001 8004) . . . . . . . . . . . . . . . . . . . . . . . . 516
PWM Count Control Register (PWM1CTCR -
0x4001 8070) . . . . . . . . . . . . . . . . . . . . . . . . 516
PWM Match Control Register (PWM1MCR -
0x4001 8014) . . . . . . . . . . . . . . . . . . . . . . . . 517
PWM Capture Control Register (PWM1CCR -
0x4001 8028) . . . . . . . . . . . . . . . . . . . . . . . . 518
PWM Control Register (PWM1PCR -
0x4001 804C) . . . . . . . . . . . . . . . . . . . . . . . 519
PWM Latch Enable Register (PWM1LER -
0x4001 8050) . . . . . . . . . . . . . . . . . . . . . . . . 520
MCPWM Interrupt registers . . . . . . . . . . . . . 529
MCPWM Interrupt Enable read address
(MCINTEN - 0x400B 8050) . . . . . . . . . . . . . 529
MCPWM Interrupt Enable set address
(MCINTEN_SET - 0x400B 8054) . . . . . . . . 530
MCPWM Interrupt Enable clear address
(MCINTEN_CLR - 0x400B 8058) . . . . . . . . 530
MCPWM Interrupt Flags read address (MCINTF -
0x400B 8068) . . . . . . . . . . . . . . . . . . . . . . . 530
MCPWM Interrupt Flags set address
(MCINTF_SET - 0x400B 806C) . . . . . . . . . 530
MCPWM Interrupt Flags clear address
(MCINTF_CLR - 0x400B 8070) . . . . . . . . . 530
MCPWM Count Control register . . . . . . . . . 531
MCPWM Count Control read address
(MCCNTCON - 0x400B 805C). . . . . . . . . . . 531
MCPWM Count Control set address
(MCCNTCON_SET - 0x400B 8060) . . . . . . 532
MCPWM Count Control clear address
(MCCNTCON_CLR - 0x400B 8064) . . . . . . 532
MCPWM Timer/Counter 0-2 registers (MCTC0-2 -
0x400B 8018, 0x400B 801C, 0x400B 8020) 532
Chapter 35: Supplementary information
UM10360
© NXP B.V. 2010. All rights reserved.
continued >>
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