LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 629

IC ARM CORTEX MCU 512K 100-LQFP

LPC1769FBD100,551

Manufacturer Part Number
LPC1769FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1769FBD100,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4966
935290522551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1769FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
UM10360
User manual
32.7.12 Read Boot Code version number
32.7.13 Read device serial number
32.7.14 Compare <address1> <address2> <no of bytes>
Table 584. ISP Read Boot Code version number command
Table 585. ISP Read device serial number command
Table 586. ISP Compare command
Command
Input
Return Code CMD_SUCCESS followed by 2 bytes of boot code version number in ASCII format.
Description
Command
Input
Return Code CMD_SUCCESS followed by the device serial number in 4 decimal ASCII groups,
Description
Command
Input
Return Code CMD_SUCCESS | (Source and destination data are equal)
Description
Example
"M 8192 268435968 4<CR><LF>" compares 4 bytes from the RAM address
K
None
It is to be interpreted as <byte1(Major)>.<byte0(Minor)>.
This command is used to read the boot code version number.
N
None.
each representing a 32-bit value.
This command is used to read the device serial number. The serial number may be
used to uniquely identify a single unit among all LPC17xx devices.
M
Address1 (DST): Starting flash or RAM address of data bytes to be compared.
This address should be a word boundary.
Address2 (SRC): Starting flash or RAM address of data bytes to be compared.
This address should be a word boundary.
Number of Bytes: Number of bytes to be compared; should be a multiple of 4.
COMPARE_ERROR | (Followed by the offset of first mismatch)
COUNT_ERROR (Byte count is not a multiple of 4) |
ADDR_ERROR |
ADDR_NOT_MAPPED |
PARAM_ERROR |
This command is used to compare the memory contents at two locations. This
command is blocked when any level of code read protection is enabled.
0x1000 0200 to the 4 bytes from the flash address 0x2000.
All information provided in this document is subject to legal disclaimers.
Chapter 32: LPC17xx Flash memory interface and programming
Rev. 2 — 19 August 2010
UM10360
© NXP B.V. 2010. All rights reserved.
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