LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 411

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
8. HNP support
UM10237_4
User manual
This section describes the hardware support for the Host Negotiation Protocol (HNP)
provided by the OTG controller.
When two dual-role OTG devices are connected to each other, the plug inserted into the
mini-AB receptacle determines the default role of each device. The device with the mini-A
plug inserted becomes the default Host (A-device), and the device with the mini-B plug
inserted becomes the default Peripheral (B-device).
Once connected, the default Host (A-device) and the default Peripheral (B-device) can
switch Host and Peripheral roles using HNP.
The context of the OTG controller operation is shown in
(Host, Device, or OTG) communicates with its software stack through a set of status and
control registers and interrupts. In addition, the OTG software stack communicates with
the external OTG transceiver through the I2C interface and the external transceiver
interrupt signal.
The OTG software stack is responsible for implementing the HNP state machines as
described in the On-The-Go Supplement to the USB 2.0 Specification.
The OTG controller hardware provides support for some of the state transitions in the
HNP state machines as described in the following subsections.
The USB state machines, the HNP switching, and the communications between the USB
controllers are described in more detail in the following documentation:
•
•
•
•
USB OHCI specification
USB OTG supplement, version 1.2
USB 2.0 specification
ISP1302 datasheet and usermanual
Rev. 04 — 26 August 2009
Chapter 15: LPC24XX USB OTG controller
Figure
15–59. Each controller
UM10237
© NXP B.V. 2009. All rights reserved.
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