LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 716

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
Table 650. Endian behavior
UM10237_4
User manual
Source
Endian
Big
Big
Big
Big
Big
Big
Big
Big
Destination
Big
Big
Big
Big
Big
Big
Big
Big
Endian
4.2.9 Error conditions
An error during a DMA transfer is flagged directly by the peripheral by asserting an Error
response on the AHB bus during the transfer. The GPDMA automatically disables the
DMA stream after the current transfer has completed, and can optionally generate an
error interrupt to the CPU. This error interrupt can be masked.
Source
Width
8
8
16
16
16
32
32
32
Destination
Width
16
32
8
16
32
8
16
32
Chapter 32: LPC24XX General Purpose DMA (GPDMA) controller
Rev. 04 — 26 August 2009
Source
Transfer no/
byte Lane
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
Source
Data
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
Destination
Transfer no/
byte Lane
1/[15:0]
2/[31:16]
1/[31:0]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
1/[15:0]
2/[31:16]
1/[31:0]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
1/[15:0]
2/[31:16]
1/[31:0]
UM10237
© NXP B.V. 2009. All rights reserved.
Destination
Data
12341234
56785678
12345678
12121212
34343434
56565656
78787878
12341234
56785678
12345678
12121212
34343434
56565656
78787878
12341234
56785678
12345678
716 of 792