LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 515

• Manufacturer Part Number: LPC2458FET180,551
• Description: IC ARM7 MCU FLASH 512K 180TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2458FET180,551

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 136
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 136
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Package: 180TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• For Use With: 622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4258; 935282454551; LPC2458FET180-S

NXP Semiconductors
UM10237_4
User manual
Fig 87. Message gets overwritten
semaphore
MsgLostx
IntPndx
look-up
access
table
bits
17.3.3 Scenario 3: Message gets overwritten indicated by Semaphore bits
17.3.4 Scenario 3.1: Message gets overwritten indicated by Semaphore bits and
write
SEM
ID,
01
This scenario is a special case in which the lost message is indicated by the existing
semaphore bits. The scenario is entered, if during a Software read of a message object
another new message gets stored by the message handler. In this case, the FullCAN
Interrupt bit gets set for a second time with the 2
Message Lost
This scenario is a sub-case to Scenario 3 in which the lost message is indicated by the
existing semaphore bits and by Message Lost.
write
D1
1st Object
write
write
D2
write
SEM
11
SEM
read
Rev. 04 — 26 August 2009
clear
SEM
00
write
SEM
ID,
01
1st Object read
write
2nd Object
D1
write
write
D2
Chapter 18: LPC24XX CAN controllers CAN1/2
write
SEM
11
Interrupt Service
read
nd
D1
Routine
Object write.
read
D2
SEM
read
clear
SEM
00
UM10237
© NXP B.V. 2009. All rights reserved.
message
handler
access
2nd Object
read
read
D1
read
processor
D2
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