LPC2458FET180,551 NXP Semiconductors, LPC2458FET180,551 Datasheet - Page 698
LPC2458FET180,551
Manufacturer Part Number
LPC2458FET180,551
Description
IC ARM7 MCU FLASH 512K 180TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2458FET180,551
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
136
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
180-TFBGA
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
32 bit
Data Ram Size
98 KB
Interface Type
CAN, Ethernet, I2C, I2S, IrDA, SPI, SSP, UART, USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
136
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, SAB-TFBGA180
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Package
180TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
For Use With
622-1023 - BOARD SCKT ADAPTER FOR TFBGA180622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
568-4258
935282454551
LPC2458FET180-S
935282454551
LPC2458FET180-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2458FET180,551
Manufacturer:
MICROCHIP
Quantity:
1 103
Company:
Part Number:
LPC2458FET180,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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UM10237_4
User manual
4.1 Memory map after any reset
4.2 Communication protocol
Pin P2.10 that is used as hardware request for ISP requires special attention. Since P2.10
is in high impedance mode after reset, it is important that the user provides external
hardware (a pull-up resistor or other device) to put the pin in a defined state. Otherwise
unintended entry into ISP mode may occur.
When ISP mode is entered after a power on reset, the IRC and PLL are used to generate
CCLK of 14.748 MHz.
The boot loader resides in an on-chip ROM sector of 8 kB in size. After any reset the
entire boot sector is also mapped to the top of the on-chip memory space i.e. the boot
block is also visible in the memory region starting from the address 0x7FFF E000. The
serial boot loader is designed to run from this memory area, and both the ISP and IAP
software use parts of the on-chip RAM. The RAM usage is described later in this chapter.
In addition, the bottom 64 byte of the ROM boot sector are also visible in the memory
region starting from address 0x0000 0000, i.e. the interrupt vectors are mapped to the
boot ROM sector. The reset vector contains a jump instruction to the entry point of the
serial boot loader software.
All ISP commands should be sent as single ASCII strings. Strings should be terminated
with Carriage Return (CR) and/or Line Feed (LF) control characters. Extra <CR> and
<LF> characters are ignored. All ISP responses are sent as <CR><LF> terminated ASCII
strings. Data is sent and received in UU-encoded format.
Fig 141. Map of lower memory after reset for flashless LPC2400 parts
2.0 GB - 8 kB
0.0 GB
2.0 GB
Rev. 04 — 26 August 2009
Chapter 31: LPC24XX On-chip bootloader for flashless parts
(BOOT BLOCK INTERRUPT VECTORS)
ACTIVE INTERRUPT VECTORS
FROM THE BOOT BLOCK
8 kB BOOT BLOCK
UM10237
0x7FFF FFFF
0x7FFF E000
0x0000 0000
© NXP B.V. 2009. All rights reserved.
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