UPSD3433EB40U6 STMicroelectronics, UPSD3433EB40U6 Datasheet - Page 101

• Manufacturer Part Number: UPSD3433EB40U6
• Description: MCU 8BIT 8032 128KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433EB40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-5660

uPSD34xx
21.2
SM2 has no effect in Mode 0, and in Mode 1, SM2 can be used to check the validity of the
stop bit. In a Mode 1 reception, if SM2 = 1, the receive interrupt will not be activated unless
a valid stop bit is received.
Serial port control registers
The SFR SCON0 controls UART0, and SCON1 controls UART1, shown in
Table
for transmit and receive (bits TB8 and RB8), and the UART Interrupt flags, TI and RI.
Table 47.
Bit 7
SM0
Bit
7
6
5
4
3
2
1
0
48. These registers contain not only the mode selection bits, but also the 9th data bit
SCON0: serial port UART0 control register (SFR 98h, reset value 00h)
Symbol
Bit 6
SM1
SM0
SM1
SM2
REN
RB8
TB8
RI
TI
Bit 5
SM2
R/W
R,W
R,W
R,W
R,W
R,W
R,W
R,W
R,W
Serial Mode Select, See
Important, notice bit order of SM0 and SM1.
[SM0:SM1] = 00b, Mode 0
[SM0:SM1] = 01b, Mode 1
[SM0:SM1] = 10b, Mode 2
[SM0:SM1] = 11b, Mode 3
Serial Multiprocessor Communication Enable.
Mode 0: SM2 has no effect but should remain 0.
Mode 1: If SM2 = 0 then stop bit ignored. SM2 =1 then RI
active if stop bit = 1.
Mode 2 and 3: Multiprocessor Comm Enable. If SM2=0, 9th
bit is ignored. If SM2=1, RI active when 9th bit = 1.
Receive Enable.
If REN=0, UART reception disabled. If REN=1, reception is
enabled
TB8 is assigned to the 9th transmission bit in Mode 2 and 3.
Not used in Mode 0 and 1.
Mode 0: RB8 is not used.
Mode 1: If SM2 = 0, the RB8 is the level of the received stop
bit.
Mode 2 and 3: RB8 is the 9th data bit that was received in
Mode 2 and 3.
Transmit Interrupt flag.
Causes interrupt at end of 8th bit time when transmitting in
Mode 0, or at beginning of stop bit transmission in other
modes. Must clear flag with firmware.
Receive Interrupt flag.
Causes interrupt at end of 8th bit time when receiving in Mode
0, or halfway through stop bit reception in other modes (see
SM2 for exception). Must clear this flag with firmware.
Bit 4
REN
Bit 3
TB8
Table 46 on page
Definition
Bit 2
RB8
Serial UART interfaces
Bit 1
TI
100.
Table 47
Bit 0
and
101/293
RI