UPSD3433EB40U6 STMicroelectronics, UPSD3433EB40U6 Datasheet - Page 272

• Manufacturer Part Number: UPSD3433EB40U6
• Description: MCU 8BIT 8032 128KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433EB40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-5660

DC and AC parameters
Note:
272/293
2
1
Table 164. USB transceiver specification
Temperature range = –45°C to 85°C.
This value includes an external resistor of 24
Figure 101. Input to output disable / enable
Table 165. CPLD combinatorial timing (5V PSD module)
Symbol
Symbol
UV
UV
t
UV
UV
t
t
R
V
PD
t
R
RISE
FALL
I
t
t
ARP
OZ
EA
ER
I
DH
CR
DL
L
OH
OL
(2)
IH
IL
High Output Voltage
Low Output Voltage
High Input Voltage
Low Input Voltage
Output Impedance (high
state)
Output Impedance (low
state)
Input Leakage Current
3-state Output OFF
State Current
Crossover Point
Rise Time
Fall Time
CPLD Input Pin/Feedback
to CPLD Combinatorial
Output
CPLD Input to CPLD
Output Enable
CPLD Input to CPLD
Output Disable
CPLD Register Clear or
Preset Delay
ENABLE/DISABLE
Parameter
Parameter
INPUT TO
OUTPUT
INPUT
Conditions
VDD = 3.3V; I
Test Conditions
V
DD
VI = V
VDD = 3.6V
VDD = 3.6V
V
= 3.3V; I
tER
DD
Note 2
Note 2
2.2mA
2.2mA
Ω
= 3.6V
IH
±1%.
or V
Min
OUT
OUT
IL
(1)
=
=
Max
20
21
21
21
Min.
1.3
28
28
3
–
2
4
4
tEA
Aloc
+ 2
PT
Typ.
±0.1
Turbo
+ 10
+ 10
+ 10
+ 10
Off
AI02863
rate
Max.
Slew
0.25
±10
0.8
– 2
– 2
– 2
– 2
43
43
±5
20
20
uPSD34xx
–
–
2
(1)
Unit
Unit
ns
ns
ns
ns
µA
µA
ns
ns
Ω
Ω
V
V
V
V
V