UPSD3433EB40U6 STMicroelectronics, UPSD3433EB40U6 Datasheet - Page 253

• Manufacturer Part Number: UPSD3433EB40U6
• Description: MCU 8BIT 8032 128KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433EB40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-5660

uPSD34xx
28.6.3
28.6.4
Note:
Figure 91. JTAG chain in uPSD34xx package
In-system programming
The ISP function can use two different configurations of the JTAG interface:
●
●
At power-up, the four basic JTAG signals are all inputs, waiting for a command to appear on
the JTAG bus from programming or test equipment. When the enabling command is
received, TDO becomes an output and the JTAG channel is fully functional. The same
command that enables the JTAG channel may optionally enable the two additional signals,
TSTAT and TERR.
4-pin JTAG ISP (default)
The four basic JTAG pins on Port C are enabled for JTAG operation at all times. These pins
may not be used for other I/O functions. There is no action needed in PSDsoft Express to
configure a device to use 4-pin JTAG, as this is the default condition. No 8032 firmware is
needed to use 4-pin ISP because all ISP functions are controlled from the external JTAG
program/test equipment.
JTAG program/test tool using 4-pin JTAG. It is required to connect the RST output signal
from the JTAG program/test equipment to the RESET_IN input on the uPSD34xx. The RST
signal is driven by the equipment with an Open Drain driver, allowing other sources (like a
push button) to drive RESET_IN without conflict.
The recommended pull-up resistors and decoupling capacitor are illustrated in
4-pin JTAG: TDI, TDO, TCK, TMS
6-pin JTAG: Signals above plus TSTAT, TERR
PC3 / TSTAT
OPTIONAL
IEEE 1149.1
PC4 / TERR
OPTIONAL
RESET_IN
JTAG TDO
JTAG TMS
JTAG TCK
Figure 92
JTAG TDI
DEBUG
shows recommended connections on a circuit board to a
MCU MODULE
PSD MODULE
TSTAT
TERR
MEMORY
FLASH
MAIN
TDO
TDI
MEMORY
TMS TCK
TMS TCK
FLASH
2ND
CONTROLLER
CONTROLLER
8032 MCU
JTAG TAP
JTAG TAP
PLD
TDI
TDO
RESET
uPSD34xx
RST
AI10460
PSD module
Figure
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92.