UPSD3433EB40U6 STMicroelectronics, UPSD3433EB40U6 Datasheet - Page 289
UPSD3433EB40U6
Manufacturer Part Number
UPSD3433EB40U6
Description
MCU 8BIT 8032 128KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet
1.UPSD3434EB40T6.pdf
(293 pages)
Specifications of UPSD3433EB40U6
Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5660
Available stocks
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Quantity
Price
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Part Number:
UPSD3433EB40U6
Manufacturer:
STMicroelectronics
Quantity:
10 000
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uPSD34xx
34.7
34.8
34.9
implemented then this extra and unexpected data packet would result in a communication
breakdown.
Workaround
Revision A and B - In the USB ISR, when an INx (x = the endpoint number of the IN FIFO)
interrupt is detected, the IN FIFOs respective busy bit should be unconditionally cleared.
The uPSD3400 USB firmware implements this workaround.
IN FIFO Pairing Operation
Description
When FIFO pairing is used on IN endpoints, an erroneous resend of a data packet may
occur. See the "Erroneous Resend of Data Packet" note as it also applies when IN FIFO
pairing is used.
Impact On Application
See the "Erroneous Resend of Data Packet" note as the impact is the same when IN FIFO
pairing is used.
Workaround
Revision A and B - See the "Erroneous Resend of Data Packet" note as the workaround is
the same when IN FIFO pairing is used.
OUT FIFO Pairing Operation
Description
When data packets are received from the host and FIFO pairing is used, the paired FIFOs
may get out of order.
Impact On Application
The received data packets are read out of order compared to the way they were sent from
the host. If the workaround is not implemented, the out of order packets would result in a
communication breakdown.
Workaround
Revision A and B - In the USB ISR, when an OUTx (x = the endpoint number of the OUT
FIFO) interrupt is detected, the OUT FIFOs respective busy bit should be unconditionally
cleared. The uPSD3400 USB firmware implements this workaround.
Missing ACK to host retransmission of SETUP packet
Description
If a host does not properly receive the ACK (due to noise) from the uPSD3400 in response
to a SETUP packet, it will resend the SETUP packet but the uPSD3400 will not respond with
Important notes
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