UPSD3433EB40U6 STMicroelectronics, UPSD3433EB40U6 Datasheet - Page 161

• Manufacturer Part Number: UPSD3433EB40U6
• Description: MCU 8BIT 8032 128KB FLASH 80TQFP
• Manufacturer: STMicroelectronics
• Series: µPSDr

Specifications of UPSD3433EB40U6

• Core Processor: 8032
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, SPI, UART/USART, USB
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• For Use With: 497-5518 - EVAL BOARD RFID READER497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 497-5660

uPSD34xx
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Table 78.
Bit 7
Bit
USB OUT FIFO Interrupt Flag (UIF2)
The USB OUT FIFO Interrupt Flag register (see
when an OUT Endpoint FIFO that was empty becomes full. Once set, firmware must
clear the flag by writing a '0' to the appropriate bit. When FIFOs are paired, only the
odd numbered FIFO Interrupt flags are active.
–
7
6
5
4
3
2
1
0
USB OUT FIFO interrupt flag (UIF2 0EAh, reset value 00h)
Symbol
OUT4F
OUT3F
OUT2F
OUT1F
OUT0F
Bit 6
–
–
–
–
Bit 5
R/W
R/W
R/W
R/W
R/W
R/W
–
–
–
–
Reserved
Reserved
Reserved
Endpoint 4 OUT FIFO Interrupt flag
This bit is set when the FIFO status changes from empty to
full.
Endpoint 3 OUT FIFO Interrupt flag
This bit is set when the FIFO status changes from empty to
full.
Endpoint 2 OUT FIFO Interrupt flag
This bit is set when the FIFO status changes from empty to
full.
Endpoint 1 OUT FIFO Interrupt flag
This bit is set when the FIFO status changes from empty to
full.
Endpoint 0 OUT FIFO Interrupt flag
This bit is set when the FIFO status changes from empty to
full.
OUT4F
Bit 4
OUT3F
Bit 3
Table
Definition
78) contains flags that indicate
OUT2F
Bit 2
OUT1F
Bit 1
USB interface
OUT0F
Bit 0
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