UPSD3433EB40U6 STMicroelectronics, UPSD3433EB40U6 Datasheet - Page 256

MCU 8BIT 8032 128KB FLASH 80TQFP

UPSD3433EB40U6

Manufacturer Part Number
UPSD3433EB40U6
Description
MCU 8BIT 8032 128KB FLASH 80TQFP
Manufacturer
STMicroelectronics
Series
µPSDr
Datasheet

Specifications of UPSD3433EB40U6

Core Processor
8032
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
497-5518 - EVAL BOARD RFID READER497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-5660

Available stocks

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Part Number:
UPSD3433EB40U6
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Manufacturer:
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0
PSD module
28.6.6
28.6.7
256/293
Recommended JTAG connector
There is no industry standard JTAG connector. STMicroelectronics recommends a specific
JTAG connector and pinout for uPSD3xxx so programming and debug equipment will easily
connect to the circuit board. The user does not have to use this connector if there is a
different connection scheme.
The recommended connector scheme can accept a standard 14-pin ribbon cable connector
(2 rows of 7 pins on 0.1” centers, 0.025” square posts, standard keying) as shown in
Figure
information.
Figure 94. Recommended JTAG connector
Chaining uPSD34xx devices
It is possible to chain a uPSD34xx device with other uPSD34xx devices on a circuit board,
and also chain with IEEE 1149.1 compliant devices from other manufacturers.
page 257
device, and so on. Only one device is performing JTAG operations at any given time while
the other two devices are in BYPASS mode. Configuration for JTAG chaining can be made in
PSDsoft Express by choosing “More than one device” when prompted about chaining
devices. Notice in
but also be aware that the two die within each uPSD34xx device are chained internally. This
internal chaining of die is transparent to the user and is taken care of by PSDsoft Express
and 3rd party JTAG tool software.
The example in
devices. The signals TSTAT and TERR are configured as open-drain type signals from
PSDsoft Express. This facilitates a wired-OR connection of TSTAT signals from multiple
uPSD34xx devices and also a wired-OR connection of TERR signals from those same
multiple devices. PSDsoft Express puts TSTAT and TERR signals into open-drain mode by
default, requiring external pull-up resistors. Click on 'Properties' in the JTAG-ISP window of
PSDsoft Express to change to standard CMOS push-pull outputs if desired, but wired-OR
logic is not possible in CMOS output mode.
94. See the STMicroelectronics “FlashLINK, FL-101 User Manual” for more
shows a chaining example. The TDO of one device connects to the TDI of the next
Figure 95 on page 257
Figure 95 on page 257
14
12
10
8
6
4
2
TERR
TSTAT
CNTL
TRST
GND
GND
RST
GND
TCK
TMS
V
JEN
TDO
TDI
CC
13
11
1
9
7
5
3
WAY
KEY
also shows how to use 6-pin JTAG when chaining
VIEW: Looking into face of shrouded
that the uPSD34xx devices are chained externally,
male connector, with 0.025"
posts on 0.1" centers.
Connector reference:
Molex 70247-1401
This connector accepts a 14-pin
ribbon cable such as:
• Samtec:
• Digikey:
HCSD-07-D-06.00-01-S-N
M3CCK-14065-ND
AI09187
Figure 95 on
uPSD34xx

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