C8051F066-GQ Silicon Laboratories Inc, C8051F066-GQ Datasheet - Page 180

• Manufacturer Part Number: C8051F066-GQ
• Description: MCU 8-Bit C8051F06x 8051 CISC 32KB Flash 3.3V 100-Pin TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F066-GQ

• Package: 100TQFP
• Device Core: 8051
• Family Name: C8051F06x
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 59
• Interface Type: I2C/SMBus/SPI/UART
• On-chip Adc: 2-chx16-bit
• Number Of Timers: 5
• Ram Size: 4.25 KB
• Program Memory Size: 32 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 59
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 336-1221

C8051F060/1/2/3/4/5/6/7
180
Flash Read Lock Byte
Bits7-0: Each bit locks a corresponding block of memory. (Bit7 is MSB).
Flash Write/Erase Lock Byte
Bits7-0: Each bit locks a corresponding block of memory.
Flash Access Limit
Read and Write/Erase Security Bits
(Bit 7 is MSB)
Figure 16.1. C8051F060/1/2/3/4/5 Flash Program Memory Map and Security Bytes
Bit
7
6
5
4
3
2
1
0
0: Read operations are locked (disabled) for corresponding block across the JTAG interface.
1: Read operations are unlocked (enabled) for corresponding block across the JTAG inter-
face.
0: Write/Erase operations are locked (disabled) for corresponding block across the JTAG
interface.
1: Write/Erase operations are unlocked (enabled) for corresponding block across the JTAG
interface.
NOTE: When the block containing the security bytes is locked, the security bytes may be
written but not erased.
The Flash Access Limit is defined by the setting of the FLACL register, as described in
Figure 16.3. Firmware running at or above this address is prohibited from using the MOVX
and MOVC instructions to read, write, or erase Flash locations below this address.
0xE000 - 0xFBFD
0xC000 - 0xDFFF
0xA000 - 0xBFFF
Memory Block
0x8000 - 0x9FFF
0x6000 - 0x7FFF
0x4000 - 0x5FFF
0x2000 - 0x3FFF
0x0000 - 0x1FFF
Write/Erase Lock Byte
Read Lock Byte
Memory Space
Program/Data
SFLE = 0
Reserved
Rev. 1.2
0xFFFF
0xFC00
0xFBFF
0xFBFE
0xFBFD
0x0000
Flash Access Limit
Scratchpad Memory
SFLE = 1
(Data only)
0x007F
0x0000