C8051F066-GQ Silicon Laboratories Inc, C8051F066-GQ Datasheet - Page 307

MCU 8-Bit C8051F06x 8051 CISC 32KB Flash 3.3V 100-Pin TQFP

C8051F066-GQ

Manufacturer Part Number
C8051F066-GQ
Description
MCU 8-Bit C8051F06x 8051 CISC 32KB Flash 3.3V 100-Pin TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Datasheets

Specifications of C8051F066-GQ

Package
100TQFP
Device Core
8051
Family Name
C8051F06x
Maximum Speed
25 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
59
Interface Type
I2C/SMBus/SPI/UART
On-chip Adc
2-chx16-bit
Number Of Timers
5
Ram Size
4.25 KB
Program Memory Size
32 KB
Program Memory Type
Flash
Operating Temperature
-40 to 85 °C
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
59
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1221

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F066-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F066-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
25.2.2. Software Timer (Compare) Mode
In Software Timer mode, the PCA0 counter/timer is compared to the module's 16-bit capture/compare reg-
ister (PCA0CPHn and PCA0CPLn). When a match occurs, the Capture/Compare Flag (CCFn) in PCA0CN
is set to logic 1 and an interrupt request is generated if CCF interrupts are enabled. The CCFn bit is not
automatically cleared by hardware when the CPU vectors to the interrupt service routine, and must be
cleared by software. Setting the ECOMn and MATn bits in the PCA0CPMn register enables Software
Timer mode.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Capture/
Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit
to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’.
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
1
ENB
ENB
W
M
P
1
6
n
x
E
C
O
M
Figure 25.5. PCA Software Timer Mode Diagram
n
PCA0CPMn
C
A
P
P
n
0 0
C
N
A
P
n
M
A
T
n
O
G
T
n
0 0
W
M
P
n
E
C
C
F
n
x
Enable
PCA
Timebase
Rev. 1.2
PCA0CPLn
PCA0L
16-bit Comparator
C8051F060/1/2/3/4/5/6/7
PCA0CPHn
PCA0H
Match
C
F
C
R
0
1
PCA0CN
C
C
F
5
C
C
F
4
C
C
F
3
C
C
F
2
PCA
Interrupt
C
C
F
1
C
C
F
0
307

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