C8051F066-GQ Silicon Laboratories Inc, C8051F066-GQ Datasheet - Page 248

MCU 8-Bit C8051F06x 8051 CISC 32KB Flash 3.3V 100-Pin TQFP

C8051F066-GQ

Manufacturer Part Number
C8051F066-GQ
Description
MCU 8-Bit C8051F06x 8051 CISC 32KB Flash 3.3V 100-Pin TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F06xr
Datasheets

Specifications of C8051F066-GQ

Package
100TQFP
Device Core
8051
Family Name
C8051F06x
Maximum Speed
25 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
59
Interface Type
I2C/SMBus/SPI/UART
On-chip Adc
2-chx16-bit
Number Of Timers
5
Ram Size
4.25 KB
Program Memory Size
32 KB
Program Memory Type
Flash
Operating Temperature
-40 to 85 °C
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
59
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 2x16b
Oscillator Type
Internal
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
336-1221

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F066-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F066-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
C8051F060/1/2/3/4/5/6/7
248
Mode
Status
Code
0x08
0x10
0x18
0x20
0x28
0x30
0x38
0x40
0x48
0x50
0x58
Data byte transmitted. ACK received.
START condition transmitted.
Repeated START condition transmitted.
Slave Address + W transmitted. ACK
received.
Slave Address + W transmitted. NACK
received.
Data byte transmitted. NACK received.
Arbitration Lost.
Slave Address + R transmitted. ACK received.
Slave Address + R transmitted. NACK
received.
Data byte received. ACK transmitted.
Data byte received. NACK transmitted.
Table 20.1. SMB0STA Status Codes and States
SMBus State
Rev. 1.2
Load SMB0DAT with Slave Address +
R/W. Clear STA.
Load SMB0DAT with Slave Address +
R/W. Clear STA.
Load SMB0DAT with data to be transmit-
ted.
Acknowledge poll to retry. Set STO +
STA.
1) Load SMB0DAT with next byte, OR
2) Set STO, OR
3) Clear STO then set STA for repeated
START.
1) Retry transfer OR
2) Set STO.
Save current data.
If only receiving one byte, clear AA (send
NACK after received byte). Wait for
received data.
Acknowledge poll to retry. Set STO +
STA.
Read SMB0DAT. Wait for next byte. If
next byte is last byte, clear AA.
Set STO.
Typical Action

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