C8051F066-GQ Silicon Laboratories Inc, C8051F066-GQ Datasheet - Page 89

• Manufacturer Part Number: C8051F066-GQ
• Description: MCU 8-Bit C8051F06x 8051 CISC 32KB Flash 3.3V 100-Pin TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F066-GQ

• Package: 100TQFP
• Device Core: 8051
• Family Name: C8051F06x
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 59
• Interface Type: I2C/SMBus/SPI/UART
• On-chip Adc: 2-chx16-bit
• Number Of Timers: 5
• Ram Size: 4.25 KB
• Program Memory Size: 32 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 59
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 336-1221

7.2.
ADC2 has a maximum conversion speed of 200 ksps. The ADC2 conversion clock is a divided version of
the system clock, determined by the AD2SC bits in the ADC2CF register (system clock divided by (AD2SC
+ 1) for 0  AD2SC  31). The ADC2 conversion clock should be no more than 3 MHz.
7.2.1. Starting a Conversion
A conversion can be initiated in one of four ways, depending on the programmed states of the ADC2 Start
of Conversion Mode bits (AD2CM1-0) in register ADC2CN. Conversions may be initiated by one of the fol-
lowing:
When CNVSTR2 is used as a conversion start source, it must be enabled in the crossbar, and the corre-
sponding pin must be set to open-drain, high-impedance mode (see
page 203
Writing a ‘1’ to AD2BUSY provides software control of ADC2 whereby conversions are performed "on-
demand". During conversion, the AD2BUSY bit is set to logic 1 and reset to logic 0 when the conversion is
complete. The falling edge of AD2BUSY triggers an interrupt (when enabled) and sets the ADC2 interrupt
flag (AD2INT). Note: When polling for ADC conversion completions, the ADC2 interrupt flag (AD2INT)
should be used. Converted data is available in the ADC2 data registers, ADC2H and ADC2L, when bit
AD2INT is logic 1. Note that when Timer 2 or Timer 3 overflows are used as the conversion source, low
byte overflows are used if the timer is in 8-bit mode; and high byte overflows are used if the timer is in 16-
bit mode. See
Modes of Operation
1. Writing a ‘1’ to the AD2BUSY bit of register ADC2CN
2. A Timer 3 overflow (i.e. timed continuous conversions)
3. A rising edge on the CNVSTR2 input signal (Assigned by the crossbar)
4. A Timer 2 overflow
for more details on Port I/O configuration).
Section “24. Timers” on page 287
Figure 7.2. Temperature Sensor Transfer Function
-50
Temperature (Celsius)
0
for timer configuration.
Rev. 1.2
V
Temp
TEMP
=
C
C8051F060/1/2/3/4/5/6/7
= (V
(Slope
Offset
TEMP
50
x Temp
- Offset) /
(V at 0 Celsius)
Slope
C
) +
(V / deg C)
Section “18. Port Input/Output” on
Slope
Offset
100
89