C8051F066-GQ Silicon Laboratories Inc, C8051F066-GQ Datasheet - Page 311

• Manufacturer Part Number: C8051F066-GQ
• Description: MCU 8-Bit C8051F06x 8051 CISC 32KB Flash 3.3V 100-Pin TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F06xr

Specifications of C8051F066-GQ

• Package: 100TQFP
• Device Core: 8051
• Family Name: C8051F06x
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 59
• Interface Type: I2C/SMBus/SPI/UART
• On-chip Adc: 2-chx16-bit
• Number Of Timers: 5
• Ram Size: 4.25 KB
• Program Memory Size: 32 KB
• Program Memory Type: Flash
• Operating Temperature: -40 to 85 °C
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 59
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 2x16b
• Oscillator Type: Internal
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 336-1221

25.2.6. 16-Bit Pulse Width Modulator Mode
Each PCA0 module may also be operated in 16-Bit PWM mode. In this mode, the 16-bit capture/compare
module defines the number of PCA0 clocks for the low time of the PWM signal. When the PCA0 counter
matches the module contents, the output on CEXn is asserted high; when the counter overflows, CEXn is
asserted low. To output a varying duty cycle, new value writes should be synchronized with PCA0 CCFn
match interrupts. 16-Bit PWM Mode is enabled by setting the ECOMn, PWMn, and PWM16n bits in the
PCA0CPMn register. For a varying duty cycle, CCFn should also be set to logic 1 to enable match inter-
rupts. The duty cycle for 16-Bit PWM Mode is given by Equation 25.3.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0 Capture/
Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the ECOMn bit
to ‘0’; writing to PCA0CPHn sets ECOMn to ‘1’.
W
M
P
1
6
n
1
PCA0CPMn
C
O
M
E
n
C
A
P
P
n
0 0 0 0
C
A
P
N
n
M
A
T
n
PCA Timebase
O
G
T
n
W
P
M
n
E
C
C
F
n
0
Enable
PCA0CPHn
PCA0H
DutyCycle
Equation 25.3. 16-Bit PWM Duty Cycle
16-bit Comparator
Figure 25.9. PCA 16-Bit PWM Mode
PCA0CPLn
PCA0L
=
Rev. 1.2

---------------------------------------------------- -
65536 PCA0CPn
Overflow
C8051F060/1/2/3/4/5/6/7
–
65536
match
S
R
SET
CLR
Q
Q

CEXn
Crossbar
Port I/O
311