FDC37B727-NS Standard Microsystems (SMSC), FDC37B727-NS Datasheet - Page 106

• Manufacturer Part Number: FDC37B727-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B727-NS

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Programmed I/O - Transfers from the Host to
the FIFO
In the forward direction an interrupt occurs when
serviceIntr is 0 and there are writeIntrThreshold or
more bytes free in the FIFO. At this time if the
FIFO is empty it can be filled with a single burst
before the empty bit needs to be re-read.
Otherwise it may be filled with writeIntrThreshold
bytes.
writeIntrThreshold =
(16-<threshold>) free
bytes in FIFO
106
An interrupt is generated when serviceIntr is 0 and
the number of bytes in the FIFO is less than or
equal to <threshold>. (If the threshold = 12, then
the interrupt is set whenever there are 12 or less
bytes of data in the FIFO.) The PINT pin can be
used for interrupt-driven systems. The host must
respond to the request by writing data to the FIFO.
If at this time the FIFO is empty, it can be
completely filled in a single burst, otherwise a
minimum of (16-<threshold>) bytes may be written
to the FIFO in a single burst. This process is
repeated until the last byte is transferred into the
FIFO.