FDC37B727-NS Standard Microsystems (SMSC), FDC37B727-NS Datasheet - Page 223

• Manufacturer Part Number: FDC37B727-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B727-NS

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Note 1: nWAIT is considered to have settled after it does not transition for a minimum of 50 ns.
Note 2: When not executing a write cycle, EPP nWRITE is inactive high.
Note 3: 85 is true only if t7 = 0.
NAME
t10
t11
t12
t13
t14
t15
t16
t17
t18
t19
t20
t21
t22
t23
t24
t25
t26
t27
t28
t1
t2
t3
t4
t5
t6
t7
t8
t9
PDATA Hi-Z to Command Asserted
nIOR Asserted to PDATA Hi-Z
nWAIT Deasserted to Command Deasserted
(Note 1)
Command Deasserted to PDATA Hi-Z
Command Asserted to PDATA Valid
PDATA Hi-Z to nWAIT Deasserted
PDATA Valid to nWAIT Deasserted
nIOR Asserted to IOCHRDY Asserted
nWRITE Deasserted to nIOR Asserted (Note 2)
nWAIT Deasserted to IOCHRDY Deasserted
(Note 1)
IOCHRDY Deasserted to nIOR Deasserted
nIOR Deasserted to SDATA Hi-Z (Hold Time)
PDATA Valid to SDATA Valid
nWAIT Asserted to Command Asserted
Time Out
nWAIT Deasserted to PDATA Driven (Note 1)
nWAIT Deasserted to nWRITE Modified (Notes 1,2)
SDATA Valid to IOCHRDY Deasserted (Note 3)
Ax Valid to nIOR Asserted
nIOR Deasserted to Ax Invalid
nWAIT Asserted to nWRITE Deasserted
nIOR Deasserted to nIOW or nIOR Asserted
nWAIT Asserted to PDIR Set (Note 1)
PDATA Hi-Z to PDIR Set
nWAIT Asserted to PDATA Hi-Z (Note 1)
PDIR Set to Command
nWAIT Deasserted to PDIR Low (Note 1)
nWRITE Deasserted to Command
TABLE 93 - EPP 1.9 DATA OR ADDRESS READ CYCLE TIMING
DESCRIPTION
224
MIN
60
60
10
60
60
40
10
40
60
60
60
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
TYP
MAX
195
190
190
185
185
180
180
180
160
30
50
24
40
75
12
85
10
20
UNITS
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns