FDC37B727-NS Standard Microsystems (SMSC), FDC37B727-NS Datasheet - Page 164

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FDC37B727-NS

Manufacturer Part Number
FDC37B727-NS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37B727-NS

Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
FDC37B727-NS
Manufacturer:
Standard
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Manufacturer:
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Notes
Note 0: CR22 Bit 5 is reset on Vtr POR only
Note 1: This register contains some bits which are read or write only.
Note 2: Register 60 is the high byte; 61 is the low byte. For example to set the primary base address to
Note 3: These configuration registers are powered by Vtr and battery backed up.
Note 4: The Activate bit for Logical Device A does not effect the generation of an interrupt (SCI).
Note 5: Bits[0,2-7] are cleared on a V
0x61
INDEX
0x60,
0x30
0x70
0xF0
(2)
1234h, write 12h into 60, and 34h into 61.
TYPE
R/W
R/W
R/W
R/W
RESET
HARD
0x00,
0x00
0x00
-
-
LOGICAL DEVICE A CONFIGURATION REGISTERS (ACPI)
Vcc POR
0x00,
0x00
0x00
-
-
CC
POR or RESET_DRV.
Vtr POR
0x00,
0x00
0x00
-
-
165
Vbat
POR
0x00
0x00
-
-
RESET
SOFT
0x00,
0x00
0x00
-
-
Activate
Primary Base I/O Address
PM1_BLK
Primary Interrupt Select
Sleep/Wake Configuration
CONFIGURATION
4
REGISTER
3
3

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