FDC37B727-NS Standard Microsystems (SMSC), FDC37B727-NS Datasheet - Page 95

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FDC37B727-NS

Manufacturer Part Number
FDC37B727-NS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37B727-NS

Pin Count
128
Lead Free Status / RoHS Status
Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
FDC37B727-NS
Manufacturer:
Standard
Quantity:
99
Part Number:
FDC37B727-NS
Manufacturer:
Microchip Technology
Quantity:
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All ISA devices supporting ECP must meet the
requirements contained in this section or the port
will not be supported by Microsoft. For a
description of the ECP Protocol, please refer to the
IEEE 1284 Extended Capabilities Port Protocol
and ISA Interface Standard, Rev. 1.14, July 14,
1993. This document is available from Microsoft.
Description
The port is software and hardware compatible with
existing parallel ports so that it may be used as a
standard LPT port if ECP is not required. The port
is designed to be simple and requires a small
number of gates to implement. It does not do any
"protocol" negotiation, rather it provides an
automatic high burst-bandwidth channel that
supports DMA for ECP in both the forward and
reverse directions.
96
Small FIFOs are employed in both forward and
reverse directions to smooth data flow and
improve the maximum bandwidth requirement.
The size of the FIFO is 16 bytes deep. The port
supports an automatic handshake for the standard
parallel port to improve compatibility mode transfer
speed.
The port also supports run length encoded (RLE)
decompression
Compression
identical bytes and transmitting an RLE byte that
indicates how many times the next byte is to be
repeated. Decompression simply intercepts the
RLE byte and repeats the following byte the
specified number of times. Hardware support for
compression
is
(required)
accomplished
is
in
by
hardware.
counting
optional.

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