FDC37B727-NS Standard Microsystems (SMSC), FDC37B727-NS Datasheet - Page 94

• Manufacturer Part Number: FDC37B727-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B727-NS

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

ECP provides a number of advantages, some of
which are listed below. The individual features are
explained in greater detail in the remainder of this
section.
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Vocabulary
The following terms are used in this document:
assert:
forward: Host to Peripheral communication.
reverse: Peripheral to Host communication
Note 1: These registers are available in all modes.
Note 2: All FIFOs use one common 16 byte FIFO.
Note 3: The ECP Parallel Port Config Reg B reflects the IRQ and DRQ selected by the Configuration
ISA IMPLEMENTATION STANDARD
data
ecpAFifo
dsr
dcr
cFifo
ecpDFifo
tFifo
cnfgA
cnfgB
ecr
High performance half-duplex forward and
reverse channel
Interlocked
transfer
Optional single byte RLE compression for
improved throughput (64:1)
Channel addressing for low-cost peripherals
Maintains link and data layer separation
Permits the use of active output drivers
Permits the use of adaptive signal timing
Peer-to-peer capability
When a signal asserts it transitions to a
"true" state, when a signal deasserts it
transitions to a "false" state.
Registers.
Addr/RLE
compress
nBusy
PD7
D7
0
0
handshake,
intrValue
EXTENDED CAPABILITIES PARALLEL PORT
MODE
nAck
PD6
D6
0
0
for
Direction
fast reliable
PError
PD5
D5
0
Parallel Port IRQ
Parallel Port Data FIFO
nErrIntrEn
ackIntEn
ECP Data FIFO
Select
PD4
Test FIFO
D4
1
94
Address or RLE field
Pword: A port word; equal in size to the width of
1
0
These terms may be considered synonymous:
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Reference Document:
Capabilities Port Protocol and ISA Interface
Standard, Rev 1.14, July 14, 1993.
document is available from Microsoft.
The bit map of the Extended Parallel Port
registers is:
This specification describes the standard ISA
interface to the Extended Capabilities Port (ECP).
SelectIn
dmaEn
nFault
PD3
PeriphClk, nAck
HostAck, nAutoFd
PeriphAck, Busy
nPeriphRequest, nFault
nReverseRequest, nInit
nAckReverse, PError
Xflag, Select
ECPMode, nSelectln
HostClk, nStrobe
D3
0
the
implementation, PWord is always 8 bits.
A high level.
A low level.
serviceIntr
PD2
nInit
D2
ISA
0
0
Parallel Port DMA
interface.
autofd
PD1
D1
full
IEEE 1284 Extended
0
0
strobe
empty
PD0
D0
0
0
For
Note
1
2
1
2
2
2
This
this