FDC37B727-NS Standard Microsystems (SMSC), FDC37B727-NS Datasheet - Page 230

• Manufacturer Part Number: FDC37B727-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B727-NS

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Note 1: Maximum value only applies if there is data in the FIFO waiting to be written out.
Note 2: BUSY is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
NAME
PDATA<7:0>
t1
t2
t3
t4
t5
t6
t7
t8
nAUTOFD
nSTROBE
BUSY
nAUTOFD Valid to nSTROBE Asserted
PDATA Valid to nSTROBE Asserted
BUSY Deasserted to nAUTOFD Changed
(Notes 1,2)
BUSY Deasserted to PDATA Changed (Notes 1,2)
nSTROBE Deasserted to Busy Asserted
nSTROBE Deasserted to Busy Deasserted
BUSY Deasserted to nSTROBE Asserted (Notes 1,2)
BUSY Asserted to nSTROBE Deasserted (Note 2)
FIGURE 29 - ECP PARALLEL PORT FORWARD TIMING
TABLE 97 - ECP PARALLEL PORT FORWARD TIMING
DESCRIPTION
t6
t2
t1
t7
231
t5
t8
MIN
80
80
80
80
t6
0
0
0
0
TYP
t3
t4
MAX
180
180
200
180
60
60
UNITS
ns
ns
ns
ns
ns
ns
ns
ns