FDC37B727-NS Standard Microsystems (SMSC), FDC37B727-NS Datasheet - Page 147

• Manufacturer Part Number: FDC37B727-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B727-NS

• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

Power Management 1 Status Register 2 (PM1_STS 2)
Register Location:
Default Value:
Attribute:
Size:
0
1
2
3
4-6
7
Note 1: This bit is set by hardware and can only be cleared by software writing a one to this bit position
and by Vbat POR. Writing a 0 has no effect.
Nore 2: In the present implementation of Button_In, pressing the button will always wake the machine
(i.e., activate nPowerOn).
BIT
PWRBTN_STS
Reserved
Reserved
PWRBTNOR_STS
Reserved
WAK_STS
NAME
<PM1_BLK>+1h System I/O Space
00h on Vbat POR
Read/Write (Note 0)
8-bits
This bit is set when the Button_In signal is asserted. In the
system working state, while PWRBTN_EN and PWRBTN_STS
are both set an SCI interrupt event is raised. In the sleeping or
soft off state, a wake-up event is generated (regardless of the
setting of PWRBTN_EN) (Note 2). This bit is only set by
hardware and is reset by software writing a one to this bit
position, and by Vbat POR. Writing a 0 has no effect. It is also
reset as follows: If PWRBTNOR_EN is set, and if the
Button_In signal is held asserted for more than four seconds,
then this bit is cleared, the PWRBTNOR_STS bit is set and the
system will transition into the soft off state (nPowerOn floats).
Reserved.
Reserved
This bit is set when the power switch over-ride function is set: If
PWRBTNOR_EN is set, and if the Button_In signal is held
asserted for more than four seconds. Hardware is also
required to reset the PWRBTN_STS when issuing a power
switch over-ride function. (Note 1)
Reserved. These bits always return a value of zero.
This bit is set when the system is in the sleeping state and an
enabled wakeup event occurs. This bit is set on the high-to-low
transition of nPowerOn, if the WAK_CTRL bit in the sleep /
wake configuration register (0xF0 in Logical Device A) is
cleared. If the WAK_CTRL bit is set, then any enabled wakeup
event will also set the WAK_STS bit in addition to the high-to-
low transition of nPowerOn. It is cleared by writing a 1 to its bit
location when nPowerOn is active (low). Upon setting this bit,
the system will transition to the working state. (Note 1)
147
DESCRIPTION