FDC37B727-NS Standard Microsystems (SMSC), FDC37B727-NS Datasheet - Page 172

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FDC37B727-NS

Manufacturer Part Number
FDC37B727-NS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37B727-NS

Pin Count
128
Lead Free Status / RoHS Status
Compliant

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DMA Channel Select Configuration Register
Note:
Note:
A DMA channel is activated by setting the DMA Channel Select register to [0x00-0x03] AND :
for the FDC logical device by setting DMAEN, bit D3 of the Digital Output Register.
for the PP logical device in ECP mode by setting dmaEn, bit D3 of the ecr.
for the UART 2 logical device, by setting the DMA Enable bit. Refer to the IRCC specification.
DMAREQ pins must tri-state if not used/selected by any Logical Device. Refer to Note A.
DMA Channel
Select
Default = 0x04
on Vcc POR or
Reset_Drv
NAME
Table 67 - DMA Channel Select Configuration Register Description
REG INDEX
0x74 (R/W)
Bits[2:0] select the DMA Channel.
0x00=DMA0
0x01=DMA1
0x02=DMA2
0x03=DMA3
0x04-0x07= No DMA active
173
DEFINITION
STATE
C

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