AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 189
AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
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23543A/0—September 2000
Misaligned I/O Read
and Write
Figure 65. Misaligned I/O Transfer
Chapter 7
BE[7:0]#
D[63:0]
A[31:3]
BRDY#
M/IO#
SCYC
ADS#
W/R#
D/C#
CLK
ADDR DATA DATA IDLE ADDR DATA DATA IDLE ADDR DATA
Misaligned I/O Read
Table 31 shows the misaligned I/O read and write cycle order
executed by the AMD-K6-IIIE+ processor. In Figure 65, the
least-significant bytes (LSBs) are transferred first. Immediately
after the processor samples BRDY# asserted, it drives the
second bus cycle to transfer the most-significant bytes (MSBs)
to complete the misaligned bus cycle.
Table 31. Bus-Cycle Order During Misaligned I/O Transfers
LSB
Type of Access
I/O Write
I/O Read
MSB
Bus Cycles
AMD-K6™-IIIE+ Embedded Processor Data Sheet
First Cycle
LSBs
LSBs
DATA
DATA
LSB
IDLE ADDR DATA
Misaligned I/O Write
Second Cycle
MSBs
MSBs
DATA
DATA
MSB
IDLE
167
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