AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 294
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AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
Lead Free Status / RoHS Status
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AMD-K6™-IIIE+ Embedded Processor Data Sheet
Figure 100. Debug Registers DR3, DR2, DR1, and DR0
272
DR3
DR2
DR0
DR1
31 30 29 28 27 26 25 24 23 22
31 30 29 28 27 26 25 24 23 22
31 30 29 28 27 26 25 24 23 22
31 30 29 28 27 26 25 24 23 22
DR3–DR0. The processor allows the setting of up to four
breakpoints. DR3–DR0 contain the linear addresses for
breakpoint 3 through breakpoint 0, respectively, and are
compared to the linear addresses of processor cycles to
determine if a breakpoint occurs. Debug register DR7 defines
the specific type of cycle that must occur in order for the
breakpoint to occur.
DR5–DR4. When debugging extensions are disabled (bit 3 of CR4
is set to 0), the DR5 and DR4 registers are mapped to DR7 and
DR6, respectively, in order to be software compatible with
previous generations of x86 processors. When debugging
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Preliminary Information
Breakpoint 3 32-bit Linear Address
Breakpoint 2 32-bit Linear Address
Breakpoint 0 32-bit Linear Address
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Breakpoint 1 32-bit Linear Address
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Test and Debug
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23543A/0—September 2000
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Chapter 13
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