AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 81
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AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
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23543A/0—September 2000
Figure 50. Page Table Entry (PTE)
3.5
Chapter 3
Symbol
31
PCD
PWT
U/S
W/R
P
AVL
D
A
Available to Software
Reserved
Dirty
Accessed
Page Cache Disable
Page Writethrough
User/Supervisor
Write/Read
Present (valid)
Description
Descriptors and Gates
Physical Page Base Address
There are various types of structures and registers in the x86
architecture that define, protect, and isolate code segments,
data segments, task state segments, and gates. These structures
are called descriptors.
The application segment descriptor is used to point to either a
data or code segment. Figure 51 on page 60 shows the
application segment descriptor format. Table 9 on page 60
contains information describing the memory segment type
to which the descriptor points.
The system segment descriptor is used to point to a task state
segment, a call gate, or a local descriptor table. Figure 52 on
page 61 shows the system segment descriptor format.
Table 10 on page 61 contains information describing the
type of segment or gate to which the descriptor points.
The AMD-K6-IIIE+ processor uses gates to transfer control
between executable segments with different privilege
levels. Figure 53 on page 62 shows the format of the gate
descriptor types. Table 10 on page 61 contains information
describing the type of segment or gate to which the
descriptor points.
Bits
11–9
6
2
1
0
8–7
5
4
3
Software Environment
AMD-K6™-IIIE+ Embedded Processor Data Sheet
12
11
10
A
V
L
9
8
7
D
6
5
A
D
4
P
C
W
3
P
T
2
U
S
/
W
1
R
/
P
0
59
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