AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 232
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AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
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AMD-K6™-IIIE+ Embedded Processor Data Sheet
210
Table 36 describes how the PWT signal is driven based on the
values of the PWT bits and the PG bit of CR0.
Table 36. PWT Signal Generation
Notes:
1. PWT is taken from PTE or PDE.
Table 37 describes how the PCD signal is driven based on the
values of the CD bit of CR0, the PCD bits, and the PG bit of
CR0.
Table 37. PCD Signal Generation
Notes:
1. PCD is taken from PTE or PDE.
Table 38 describes how the CACHE# signal is driven based on
the cycle type, the CI bit of TR12, the PCD signal, and the
UWCCR model-specific register.
CD Bit of CR0
PWT Bit
1
0
1
0
1
0
0
0
0
1
Preliminary Information
Cache Organization
PG Bit of CR0
PCD Bit
1
1
0
0
X
1
0
1
0
1
PG Bit of CR0
PWT Signal
High
Low
Low
Low
X
1
1
0
0
PCD Signal
High
High
Low
Low
Low
23543A/0—September 2000
Chapter 9
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