AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 76
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AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
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AMD-K6™-IIIE+ Embedded Processor Data Sheet
3.3
Table 8.
Figure 44. Memory Management Registers
54
Global and Interrupt Descriptor Table Registers
Local Descriptor Table Register and Task Register
Register Name
Global Descriptor Table Register
Interrupt Descriptor Table Register
Local Descriptor Table Register
Task Register
63
Memory Management Registers
Memory Management Registers
32-Bit Linear Base Address
The AMD-K6-IIIE+ processor controls segmented memory
management with the registers listed in Table 8. Figure 44
shows the formats of these registers.
47
Contains a pointer to the task state segment of the current task
Function
Contains a pointer to the base of the global descriptor table
Contains a pointer to the base of the interrupt descriptor table
Contains a pointer to the local descriptor table of the current task
Preliminary Information
Software Environment
32-Bit Linear Base Address
32
31
32-Bit Limit
16
15
15
15
16-Bit Limit
23543A/0—September 2000
Attributes
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