AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 26
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AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
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AMD-K6™-IIIE+ Embedded Processor Data Sheet
The AMD-K6-IIIE+ embedded processor is available in two versions.
Innovative Cache Design for Faster Data Access
Recognizing the benefits of a large and fast cache design in feeding performance-
hungry applications, AMD developed an innovative cache architecture that enhances
the performance available for embedded applications based on the Super7 platform.
AMD’s cache design innovations include:
The processor's multiport internal cache design enables both the 64-Kbyte L1 cache
and the 256-Kbyte L2 cache to perform simultaneous 64-bit read and write operations
in a clock cycle. This multiport capability allows data to be processed faster and more
efficiently than non-multiported designs. In addition, the processor core can access
both L1 and L2 caches simultaneously, which further enhances overall CPU
throughput.
The cache design is exceptionally fast, with the backside 256-Kbyte L2 cache
operating at full processor speed.
For example, the internal L2 cache of an AMD-K6-IIIE+/450 processor operates at 450
MHz and provides nine times the peak bandwidth of an external L2 cache operating
at 100 MHz. The maximum peak bandwidth of an external L2 cache operating at 100
MHz is 800 Mbytes/s, while an internal L2 cache operating at 450 MHz delivers a
maximum peak bandwidth of 3,600 Mbytes/s per port. Because the internal L2 cache
of the AMD-K6-IIIE+ processor is dual-ported for simultaneous reads and writes, the
total peak bandwidth is doubled to 7,200 Mbytes/s, resulting in a maximum peak
bandwidth nine times as large as a 100-MHz cache implementation.
4
The low-power version operates at the lowest core voltage in order to offer the
lowest available power and extended temperature ratings. Enhanced power
management features are provided via AMD PowerNow! technology in the low-
power versions of the processor.
The standard-power version has a 2.0-V core voltage and offers standard power
and temperature specifications similar to desktop PC processors.
An internal 256-Kbyte L2 write-back cache operating at the full speed of the
processor and complementing the 64-Kbyte L1 cache, which is standard in all
AMD-K6 family processors.
A multiport internal cache design, enabling simultaneous 64-bit reads and writes
to both the L1 cache and the L2 cache.
A 4-way set associative backside L2 cache design enabling optimal data
management and external frontside data bus bandwidth efficiency.
AMD-K6™-IIIE+ Embedded Processor
Preliminary Information
23543A/0—September 2000
Chapter 1
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