AMD-K6-IIIE+550ACR AMD (ADVANCED MICRO DEVICES), AMD-K6-IIIE+550ACR Datasheet - Page 320
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AMD-K6-IIIE+550ACR
Manufacturer Part Number
AMD-K6-IIIE+550ACR
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.AMD-K6-IIIE550ACR.pdf
(370 pages)
Specifications of AMD-K6-IIIE+550ACR
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AMD-K6™-IIIE+ Embedded Processor Data Sheet
16.1
16.2
Table 62. CLK Switching Characteristics for 100-MHz Bus Operation
Notes:
1. The jitter frequency power spectrum peaking must occur at frequencies greater than (Frequency of CLK)/3 or less than 500 kHz.
298
Symbol
t
t
t
t
t
1
2
3
4
5
Parameter Description
Frequency
CLK Period
CLK High Time
CLK Low Time
CLK Fall Time
CLK Rise Time
CLK Period Stability
CLK Switching Characteristics
Clock Switching Characteristics for 100-MHz Bus Operation
Table 62 and Table 63 on page 299 contain the switching
characteristics of the CLK input to the AMD-K6-IIIE+ processor
for 100-MHz and 66-MHz bus operation, respectively, as
measured at the voltage levels indicated by Figure 104 on page
299.
The CLK Period Stability parameter specifies the variance
(jitter) allowed between successive periods of the CLK input
measured at 1.5 V. This parameter must be considered as one of
the elements of clock skew between the AMD-K6-IIIE+
processor and the system logic.
1
Signal Switching Characteristics
Preliminary Information
33.3 MHz
10.0 ns
0.15 ns
0.15 ns
3.0 ns
3.0 ns
Min
Preliminary Data
100 MHz
250 ps
1.5 ns
1.5 ns
Max
Figure
104
104
104
104
104
23543A/0—September 2000
Comments
In Normal Mode
In Normal Mode
Chapter 16
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