TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 108

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

3.6.3
Example:
TMP91C820A
to 16 bits and the number of waits is set to 0.
D8 to D15
A0 to A23
In this example CS0 is set to be the 64-Kbyte area 010000H to 01FFFFH. The bus width is set
D0 to D7
A0-A23
Connecting External Memory
connected using an 8-bit bus.
(P6FC) to 0 and disables output of the CS signal. To output the CS signal, the appropriate
bit must be set to 1.
MSAR0 = 01H .......... Start address: 010000H
MAMR0 = 07H ......... Address area: 64 Kbytes
B0CS = 83H.............. ROM/SRAM, 16-bit data bus, 0 waits, CS0 area settings enabled
CS0
CS1
CS2
RD
WR
Figure 3.6.6 shows an example of how to connect external memory to the TMP91C820A.
In this example the ROM is connected using a 16-bit bus. The RAM and I/O are
A reset clears all bits of the port 6 control register (P6CR) and the port 6 function register
area address, the CPU accesses the internal address area and no chip select signal
is output on any of the
If a CS0 to S3 address is specified which is actually an internal I/O and RAM
Figure 3.6.6 Example of External Memory Connection
(ROM uses 16-bit bus; RAM and I/O use 8-bit bus.)
91C820A-106
CS
OE
CS0
Upper byte
ROM
to
CS3
CS
OE
pins.
Address bus
Lower byte
ROM
CS
OE WE
RAM
8-bit
CS
OE
WE
8-bit
I/O
TMP91C820A
2008-02-20