TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 196

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

SBI0DBR
SBI0CR1
(0241H)
(0240H)
Prohibit
read-
modify-
write
Prohibit
read-
modify-
write
3.10.7
Note: Set the tranfer mode and the serial clock after setting <SIOS> to 0 and <SIOINH> to 1.
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Clocked Synchronous 8-Bit SIO Mode control
serial bus interface (SBI) is being operated in clocked synchronous 8-bit SIO mode.
The following registers are used to control and monitor the operation status when the
Transfer start
0: Stop
1: Start
SIOS
DB7
7
7
0
Figure 3.10.20 Register for the SIO Mode (1/3)
Continue/
abort transfer
0: Continue
1: Abort
SIOINH
transfer
transfer
DB6
6
0
6
Serial Bus Interface Data Buffer Register
Serial Bus Interface Control Register 1
W
Transfer mode select
00: Transmit mode
01: (Reserved)
10: Transmit/receive mode
11: Receive mode
SIOM1
DB5
5
5
0
91C820A-194
R (Receiver)/W (Transfer)
DB4
SIOM0
4
Serial clock selection <SCK2:0> at write
000
001
010
011
100
101
110
111
Transfer mode selection
Continue/abort transfer
Transfer start/stop
4
0
00 8-bit transmit mode
01 (Reserved)
10 8-bit transmit/received mode
11 8-bit received mode
Undefined
0
1
0
1
Continue transfer
Abort transfer (Automatically cleared after transfer
aborted)
Stopped
Started
n = 10
n = 4
n = 5
n = 6
n = 7
n = 8
n = 9
−
DB3
3
3
External clock
(Inputted from
1125.0 kHz
sck pin )
562.5 kHz
281.3 kHz
140.6 kHz
2.3 MHz
70.3 kHz
35.2 kHz
DB2
Serial clock selection and reset monitor
2
SCK2
2
0
W
System clcok: fc
Clock gear: fc/1
fc = 36 MHz
(Output to SCK pin)
fscl =
DB1
1
SCK1
1
0
2
fc
n
TMP91C820A
[Hz]
DB0
0
2008-02-20
SCK0
W
0
0