TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 303

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TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
TB0RG0-WR
X: Don’t care, − : No change
TB0RUN
TB0RG0
TB0RG1
TB0RUN
TB0FFCR
TB0MOD
PBCR
PBFC
TB0RUN
φT16
TB0RUN<TB0RDE>
φT1
φT4
The following block diagram illustrates this mode.
The following example shows how to set 16-bit PPG output mode:
← 0
← 1
← X
← 0
← X
← X
← 1
Selector
Selector
7
*
*
*
*
Figure 3.17.8 Block Diagram of 16-Bit Mode
6
0
*
*
*
*
0
X
0
1
1
0
5
X
*
*
*
*
X
0
1
X
4
X
*
*
*
*
X
0
0
X
16-bit comparator
Register buffer 0
( ** = 01, 10, 11)
3
*
*
*
*
1
0
TB0RG0
2
0
*
*
*
*
0
1
1
X
X
1
91C820A-301
1
X
*
*
*
*
X
1
*
X
0
0
*
*
*
*
0
0
*
1
Internal data bus
16-bit up counter
Match
UC0
Disable the TB0RG0 double buffer and stop TMRB0.
Set the duty ratio.
(16 bits)
Set the frequency.
(16 bits)
Enable the TB0RG0 double buffer.
(The duty and frequency are changed on an INTTB01
interrupt.)
Set the mode to invert TB0FF0 at the match with
TB0RG0/TB0RG1. Set TB0FF0 to 0.
Select the internal clock as the input clock and disable
the capture function.
Set PB6 to function as TB0OUT0.
Start TMRB0.
TB0RUN<TB0RUN>
16-bit comparator
TB0RG1
Clear
TB0OUT0 (PPG output)
(TB0FF0)
F/F
TMP91C820A
2008-02-20

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