TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 134

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

000000H
100000H
200000H
300000H
380000H
3C0000H
3D0000H
3E0000H
3F0000H
400000H
600000H
800000H
C00000H
E00000H
FFFF00H
FFFFFFH
Address
3.8.1
512 Kbytes
256 Kbytes
64 Kbytes
64 Kbytes
64 Kbytes
64 Kbytes
256 bytes
2 Mbytes
2 Mbytes
4 Mbytes
2 Mbytes
2 Mbytes
1 Mbyte
1 Mbyte
1 Mbyte
Size
Recommendable Memory Map
correspondence is shown in Figure 3.8.1. And, a physical-address map is shown in Figure
3.8.2.
section of CS/WAIT controller. Setting of register in MMU is not necessary.
Bank is called common-area.
changed.
The recommendation logic address memory map at the time of variety extension memory
However, when memory area is less than 16 Mbytes and is not expanded, please refer to
The area which can be set as Bank is called local-area. While the area for managing the
Since they are being fixed, the address of a common-area and a local-area cannot be
Figure 3.8.1 Recommendation Address Map (Physical address)
Memory map
COMMON0
COMMON1
COMMON2
Vector area
LOCAL0
LOCAL1
LOCAL3
LOCAL2
0
0
0
0
1
1
1
1
91C820A-132
2
2
2
2
BANK
3
3
3
…
4
4
4
5
5
5
22 23
6
6
6
7
7
7
CS/WAIT
CS0
CSEX
CSEX
CSEX
CSEX
CSEX
CSEX
CS1
CS2A
CS3
CS2
: Internal area
: Overlapped with COMMON area
D1BSC
D2BLP
D3BFR
DLEBCD
CS2B (BANK0 to BANK3)
CS2E (BANK12 to BANK15)
CS2F (BANK16 to BANK19)
CS3
CS0
CS1
CS2C (BANK4 to BANK7)
CS2D (BANK8 to BANK11)
CS2G (BANK20 to BANK23)
CS2A
CSEXA
CS
−
pin
TMP91C820A
2008-02-20