TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 118

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

TA23MOD
(010CH)
Bit symbol
Read/Write
After reset
Function
Operation mode
00: 8-bit timer mode
01: 16-bit timer mode
10: 8-bit PPG mode
11: 8-bit PWM mode
TA23M1
7
0
TA23M0
6
0
Figure 3.7.6 Register for TMRA
PWM cycle
00: Reserved
01: 2
10: 2
11: 2
PWM21
TMRA23 Mode Register
5
0
6
7
8
91C820A-116
PWM20
4
0
R/W
TMRA2 source clock selection
TMRA3 source clock selection
PWM cycle selection
TMRA23 operation mode selection
TMRA3 clock for TMRA3
00: TA2TRG
01: φT1
10: φT16
11: φT256
TA3CLK1
00
01
10
11
00
01
10
11
00
01
10
11
00
01
10
11
3
0
Do not set
φT1 (Prescaler)
φT4 (Prescaler)
φT16 (Prescaler)
TA23MOD
<TA23M1:0> ≠ 01
Comparator output
from TMRA2
φT1
φT16
φT256
Reserved
2
2
2
Two 8-bit timers
16-bit timer
8-bit PPG
8-bit PWM (TMRA2) + 8-bit timer (TMRA3)
6
7
8
× source clock
× source clock
× source clock
TA3CLK0
2
0
TMRA2 clock for TMRA2
00: Reserved
01: φT1
10: φT4
11: φT16
TA2CLK1
1
0
TA23MOD
<TA23M1:0> = 01
Overflow output from
TMRA2
(16-bit timer mode)
TA2CLK0
TMP91C820A
0
0
2008-02-20