TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 141

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TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
and
BANK register of LOCAL2 area upper 3-bit address of jumping point.
actually jump to physical 200000H to 3FFFFFH address. When return to COMMON area, it
can only jump to E00000H to FFFFFFH without writing to BANK register of LOCAL2 area.
conflict with is possible. When two kinds or more logical addresses to show COMMON area
exist, management of BANK is confused. We recommend not using The BANK setting, BANK
address and COMMON address conflict with.
area in SDRAM. Because of, LCD displays DMA occur at sycronousless. If SDRAM BANK is
changed, you don’t need to care only COMMON area.
moves from a BANK to a BANK. In other words, it must write to BANK register only in
COMMON area and it prohibits writing the BANK registers in BANK area. If it modify the
bank register’s data in BANK area, program runaway.
display data is not controlled by the CPU. Therefore if BANK of display area is changed during
LCD displaying, it cannot display. It is recommended to allocate display data to a COMMON
area.
At Figure 3.8.7, it shows example of program jump.
In the same way with before example, two dot line squares show each
After setting BANK1, jumping C00000H to DFFFFFH address: logical LOCAL2 address,
By a way of setting of BANK register, the setting that BANK address and COMMON address
When using LCD display data for SDRAM, we recommend setting display area to COMMON
It is a mark paid attention to here, it needs to go by way of COMMON area by all means when
Please do not set Bank function of MMU as display RAM. This is because reading LCDC
CS1
’s (SDCS) SDRAM. Program start from E00000H COMMON address, firstly, write to
91C820A-139
CS2
’s program ROM
TMP91C820A
2008-02-20

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