TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 343

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

Symbol
SC2MOD0
SC2MOD1
SC2BUF
BR2ADD
(8-4) UART/SIO channel 2
SC2CR
BR2CR
UART/serial channel (3/3)
Serial
channel 2
buffer
Serial
channel 2
control
Serial
channel 2
mode
Baud rate
control
Serial
channel 2
K setting
register
Serial
channel 2
mode1
Name
Address
(Prohibit
RMW)
210H
211H
212H
213H
214H
215H
Transmission
data bit8
Always
write “0”.
IDLE2
0: Stop
1: Operate
Undefined
Receiving
data bit8
RB7/TB7
I2S2
RB8
TB8
R/W
7
R
0
−
0
0
Always
write “0”.
1: (16 − K)/16
Duplex
0: Half
1: Full
Parity
0: Odd
1: Even
BR2ADDE BR2CK1
RB6/TB6
FDPX2
divided
enable
EVEN
R/W
6
0
−
0
0
0
91C820A-341
R/W
1: Receive
00: φT0
01: φT2
10: φT8
11: φT32
1: Parity
RB5/TB5
enable
enable
RXE
PE
5
0
0
0
R (Receiving)/W (Transmission)
1: Wakeup
RB4/TB4
BR2CK0
Overrun
OERR
enable
WU
R (Cleared to 0 by reading)
4
0
0
0
Undefined
R/W
R/W
00: Reserved
01: UART 7 bits
10: UART 8 bits
11: UART 9 bits
RB3/TB3
1: Error
BR2S3
BR1K3
PERR
Parity
SM1
3
0
0
0
0
Setting of the divided frequency “N”
(Divided by N = (16 − K)/16)
Sets frequency divisor “K”
RB2/TB2
Framing
BR2S2
BR1K2
FERR
SM0
2
0
0
0
0
(0 to F)
R/W
00: TA0TRG
01: Baud rate generator
10: Internal clock f
11: Reserved
Always
write “0”.
RB1/TB1
BR2S1
BR1K1
SC1
TMP91C820A
1
−
0
0
0
0
2008-02-20
R/W
Always
write “0”.
RB0/TB0
BR2S0
BR1K0
SC0
0
−
0
0
0
0
SYS