TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 208

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

ADMOD1
(02B1H)
Bit symbol
Read/Write
After reset
Function
Note: As pin AN3 also functions as the
<ADTRGE> set to 1.
VREF
application
control
0: OFF
1: ON
VREFON
R/W
7
0
Figure 3.11.3 AD Converter Related Register
IDLE2
0: Stop
1: Operate
I2AD
R/W
6
0
AD Mode Control Register 1
5
<ADCH2:0>
ADTRG
91C820A-206
011 (Note)
input pin, do not set <ADCH2:0> = 011 when using
000
001
010
100
101
110
111
4
<SCAN>
AD external
trigger start
control
0: Disable
1: Enable
ADTRGE
Analog input channel selection
AD conversion start control by external trigger
(
IDLE2 control
Control of application of reference voltage to
AD converter
Before starting conversion (before writing 1 to
ADMOD0<ADS>), set the <VREFON> bit to 1.
3
0
0
1
0
1
0
1
ADTRG
Channel
fixed
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
Disabled
Enabled
Stopped
In operation
OFF
ON
0
Analog input channel selection
input)
ADCH2
2
0
AN0
AN0 → AN1
AN0 → AN1 → AN2
AN0 → AN1 → AN2 → AN3
AN4
AN4 → AN5
AN4 → AN5 → AN6
AN4 → AN5 → AN6 → AN7
R/W
ADCH1
1
0
scanned
Channel
1
TMP91C820A
ADCH0
ADTRG
0
0
2008-02-20
with