TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 302

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

3.17.4
X: Don’t care, −: No change
TB0RUN
INTETB01
TB0FFCR
TB0MOD
TB0RG1
TB0RUN
(Value to be compared)
Match with TB0RG0
(INTTB00 inerrupt)
Match with TB0RG1
(INTTB01 interrupt)
Operation in Each Mode
(1) 16-bit timer mode
(2) 16-bit programmable pulse generation (PPG) output mode
Match with TB0RG0
Match with TB0RG1
Figure 3.17.6 Programmable Pulse Generation (PPG) Output Waveforms
interval time is set in the timer register TB0RG1.
pulse may be either low active or high active.
enabled by the match of the up counter UC0 with timer register TB0RG0 or TB0RG1
and to be output to TB0OUT0. In this mode the following conditions must be satisfied.
0 will be shifted into TB0RG0 at match with TB0RG1. This feature facilitates the
handling of low-duty waves.
TB0OUT0 pin
Register buffer
Generating interrupts at fixed intervals
In this example, the interrupt INTTB01 is set to be generated at fixed intervals. The
Square wave pulses can be generated at any frequency and duty ratio. The output
The PPG mode is obtained by inversion of the timer flip-flop TB0FF0 that is to be
(Value set in TB0RG0) < (Value set in TB0RG1)
When the TB0RG0 double buffer is enabled in this mode, the value of register buffer
←
← X
←
←
←
←
TB0RG0
7
0
1
0
*
*
0
6
0
1
1
0
*
*
0
Figure 3.17.7 Operation of Register Buffer
X
X
5
0
0
1
*
*
Up counter = Q
4
X
0
0
0
X
*
*
(** = 01, 10, 11)
X
3
–
0
0
*
*
–
2
0
0
0
1
*
*
1
Q
91C820A-300
1
1
X
0
1
X
*
*
*
1
0
0
0
1
1
*
*
*
Q
2
Stop TMRB0.
Enable INTTB01 and set interrupt level 4. Disable INTTB00.
Disable the trigger.
Select internal clock for input and
disable the capture function.
Set the interval time.
(16 bits)
Start TMRB0.
Shift into theTB0RG1
Up counter = Q
Write into the TB0RG0
Q
2
2
Q
3
TMP91C820A
2008-02-20