TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 174

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TMP91xy20AFG

Manufacturer Part Number
TMP91xy20AFG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy20AFG

Package
LQFP144
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
M
Rom Combinations
8
Ram Combinations
8
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
1
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
8
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
1
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
77
Power Supply Voltage(v)
3.0 to 3.6
used for the purposes of this explanation.
Example: To link two slave controllers serially with the master controller using the
TXD
Since Serial Channels 0 and 1 operate in exactly the same way, channel 0 only is
Setting the master controller
Setting the slave controller
PCCR
PCFC
INTES0
SC0MOD0
SC0BUF
SC0MOD0
SC0BUF
PCCR
PCFC
PCODE
INTES0
SC0MOD0
Acc ← SC0BUF
if Acc = select code
Then SC0MOD0 ← − − − 0 − − − − Clear <WU> to 0.
Main
INTTX0 interrupt
Main
INTRX0 interrupt
Master
RXD
internal clock f
← − − − − − − 0 1
← − − − − − − X 1
← 1 1 0 0 1 1 0 1
← 1 0 1 0 1 1 1 0
← 0 0 0 0 0 0 0 1
← 0 − − − − − − −
← * * * * * * * *
← − − − − − − 0 1
← − − − − − − X 1
← X X X X − X X 1
← 1 1 0 1 1 1 1 0
← 0 0 1 1 1 1 1 0
SYS
91C820A-172
TXD
Select code
00000001
as the transfer clock.
Slave 1
RXD
Enable the INTTX0 interrupt and set it to interrupt level 4.
Enable the INTRX0 interrupt and set it to interrupt level 5.
Set f
Set the select code for slave controller 1.
Set TB8 to 0.
Set data for transmission.
Enable INTRX0 and INTTX0.
Set <WU> to 1 in 9-bit UART transmission mode using f
as the transfer clock.
Set PC0 and PC1 to function as the TXD0 and RXD0 pins
respectively.
Select PC1 and PC0 to function as the RXD0 and TXD0 pins
respectively (Open-drain output).
SYS
as the transmission clock for 9-bit UART mode.
TXD
Select code
00001010
Slave 2
RXD
TMP91C820A
2008-02-20
SYS

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