TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 238

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

3.14.2
Lower rate clock: fs
System clock: f
CPU address bus:
A0 to A23
CPU BUSAK
Note: Row means common, and column means segment.
Output
Block Diagram
TA3OUT
data bus
data bus
Internal
Internal
<TA3LCDE>EMCCR0
data bus
Internal
SYS
f
SYS
DVM register
COLUMN register
To internal INT
(Rising edge)
ROW register
Generator
InnerSCP
Incrementor
FR driver
register
ROW
FP
LCDCK
clock divider
Figure 3.14.1 LCDC Block Diagram
Cursor control
2×, 4×, 8×
BCD generator
LP generator
FR generator
COLUMN counter
Comparator
Shift register
Counter
Incrementor
Increment
Incrementor
COLUMN
(14 bits)
ROW
(14bits)
(9 bits)
91C820A-236
<START>
Selector
COLUMN
Clear
END
R
S
LP output
Q
circuit
FR output
SCPEN
80-byte FIFO and
driver
SCP generator
Gray scale
MMU
Control
CPU BUSRQ Input
External data bus
A0 to A23
External data bus
D0 to D15
External D2BLP
External DLEBCD
External D3BFR
LCD Exclusive Data bus
LD0 to LD7
External D1BSCP
TMP91C820A
2008-02-20