TMP91xy20AFG Toshiba, TMP91xy20AFG Datasheet - Page 184

• Manufacturer Part Number: TMP91xy20AFG
• Manufacturer: Toshiba

Specifications of TMP91xy20AFG

• Package: LQFP144
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): M
• Rom Combinations: 8
• Ram Combinations: 8
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 1
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 8
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: 1
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 77
• Power Supply Voltage(v): 3.0 to 3.6

3.10.5
Control in I
(1) Acknowledge mode specification
(2) Number of transfer bits
(3) Serial clock
TMP91C820A generates an additional clock pulse for an acknowledge signal when
operating in master mode. In the transmitter mode during the clock pulse cycle, the
SDA pin is released in order to receive the acknowledge signal from the receiver. In the
receiver mode during the clock pulse cycle, the SDA pin is set to the low in order to
generate the acknowledge signal.
does not generate a clock pulse for the acknowledge signal when operating in the
master mode.
receiving data.
direction bit transmission are executed in 8 bits. Other than these, the <BC2:0>
retains a specified value.
a.
Set the SBI0CR1<ACK> to 1 for operation in the acknowledge mode. The
Clear the <ACK> to 0 for operation in the non-acknowledge mode. The TMP91C820A
The SBI0CR1<BC2:0> is used to select a number of bits for next transmitting and
Since the <BC2:0> is cleared to 000 as a start condition, a slave address and
Clock source
outputted on the SCL pin in master mode. Set a communication baud rate that
meets the I
the equations shown below.
The SBI0CR1<SCK2:0> is used to select a maximum transfer frequency
2
C Bus Mode
Note 1: f
Note 2: It’s prohibit to use fc/16 prescaler clock when using SBI block.
t
t
fscl = 1/(t
LOW
HIGH
=
t
HIGH
= 2
= 2
(I
SBI
2
2
C bus specification, such as the shortest pulse width of t
C bus and clock synchronous.)
2
n − 1
n − 1
LOW
f
n
SBI
shows f
/f
/f
+ 8
SBI
SBI
Figure 3.10.7 Clock Source
+ t
+ 8/f
HIGH
FPH
t
LOW
SBI
)
91C820A-182
.
SBI0CR1<SCK2:0>
000
001
010
011
100
101
110
1/fscl
10
11
n
5
6
7
8
9
TMP91C820A
LOW
2008-02-20
, based on